An array substrate includes a plurality of signal lines disposed in a display area; a plurality of signal pads disposed in a non-display area; and a fan-out portion disposed in the non-display. The fan-out portion includes a plurality of fan-out lines connecting the plurality of signal lines to the plurality of signal pads. Each of the plurality of fan-out lines includes a pattern electrically connected to a corresponding signal pad of the plurality of signal pads, and a straight portion electrically connected to a corresponding signal line of the plurality of signal lines. The pattern includes a first conductive layer. The straight portion includes the first conductive layer and a second conductive layer disposed on the first conductive layer.