Invention Grant
- Patent Title: Low temperature polycrystalline silicon TFT array substrate and method of producing the same, display apparatus
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Application No.: US14769891Application Date: 2014-09-30
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Publication No.: US09947697B2Publication Date: 2018-04-17
- Inventor: Chunping Long , Yinan Liang , Zheng Liu , Zuqiang Wang , Xueyan Tian
- Applicant: BOE Technology Group Co., Ltd.
- Applicant Address: CN Beijing
- Assignee: BOE TECHNOLOGY GROUP CO., LTD.
- Current Assignee: BOE TECHNOLOGY GROUP CO., LTD.
- Current Assignee Address: CN Beijing
- Agency: Westman, Champlin & Koehler, P.A.
- Priority: CN201410305758 20140630
- International Application: PCT/CN2014/087893 WO 20140930
- International Announcement: WO2016/000336 WO 20160107
- Main IPC: H01L27/12
- IPC: H01L27/12 ; H01L27/32

Abstract:
The present disclosure provides a low temperature polycrystalline silicon field effect TFT array substrate and a method for producing the same and a display apparatus. The method: using a stepped photo resist process to form a polycrystalline silicon active layer and a lower polar plate of a polycrystalline silicon storage capacitor simultaneously on a substrate in one lithographic process; forming a gate insulation layer on the polycrystalline silicon active layer and the lower polar plate of the polycrystalline silicon storage capacitor; forming a metal layer on the gate insulation layer and etching the metal layer to form a gate electrode and gate lines connected with the gate electrode, a source electrode, a drain electrode and data lines connected with the source electrode and the drain electrode; forming a passivation layer, a photo resist layer and a pixel electrode layer in sequence and patterning the passivation layer, the photo resist layer and the pixel electrode layer to form patterns of an interlayer insulation layer via hole and a pixel electrode in one lithographic process; forming a pixel definition layer on the pixel electrode. The present disclosure may reduce times of lithographic processes for the low temperature polycrystalline silicon field effect TFT array substrate, improve the yield and reduce the costs.
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