Invention Grant
- Patent Title: 3D integrated circuit device
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Application No.: US15622124Application Date: 2017-06-14
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Publication No.: US09954080B2Publication Date: 2018-04-24
- Inventor: Zvi Or-Bach , Deepak C. Sekar , Brian Cronquist
- Applicant: Monolithic 3D Inc.
- Applicant Address: US CA San Jose
- Assignee: MONOLITHIC 3D INC.
- Current Assignee: MONOLITHIC 3D INC.
- Current Assignee Address: US CA San Jose
- Agency: Tran & Associates
- Main IPC: H01L29/76
- IPC: H01L29/76 ; H01L29/94 ; H01L31/062 ; H01L31/113 ; H01L31/119 ; H01L29/00 ; H01L29/66 ; H01L23/544 ; H01L27/02 ; H01L27/088 ; H01L21/74 ; H01L27/11551 ; H01L29/78 ; H01L23/34 ; H01L27/11573 ; H01L23/50 ; H01L27/11526 ; H01L23/48 ; H01L27/118 ; H01L29/10 ; H01L27/108 ; H01L29/732 ; H01L27/11578 ; H01L29/808 ; H01L27/06 ; H01L27/24

Abstract:
A 3D integrated circuit device, including: a first transistor; a second transistor; and a third transistor, where the third transistor is overlaying the second transistor and the second transistor is overlaying the first transistor, where the first transistor controls the supply of a ground or a power signal to the third transistor, and where the first transistor, the second transistor and the third transistor are aligned to each other with less than 100 nm misalignment.
Public/Granted literature
- US20170287844A1 3D INTEGRATED CIRCUIT DEVICE Public/Granted day:2017-10-05
Information query
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