- Patent Title: Display circuitry with reduced pixel parasitic capacitor coupling
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Application No.: US14174471Application Date: 2014-02-06
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Publication No.: US09965063B2Publication Date: 2018-05-08
- Inventor: Abbas Jamshidi Roudbari , Shih-Chang Chang , Ting-Kuo Chang , Cheng-Ho Yu
- Applicant: Apple Inc.
- Applicant Address: unknown Cupertino
- Assignee: Apple Inc.
- Current Assignee: Apple Inc.
- Current Assignee Address: unknown Cupertino
- Agency: Treyz Law Group, P.C.
- Agent Jason Tsai
- Main IPC: G06F3/041
- IPC: G06F3/041 ; G02F1/1333 ; G02F1/136 ; G02F1/1362

Abstract:
A touch screen display may have a color filter layer and a thin-film transistor layer. A layer of liquid crystal material may be located between the color filter layer and the thin-film transistor (TFT) layer. The TFT layer may include thin-film transistors formed on top of a glass substrate. Each display pixel in the TFT layer may include first and second TFTs coupled in series between a data line and a storage capacitor. The first TFT may have a gate that is coupled to a gate line. The second TFT may have a gate that is coupled to a control line that is different than the gate line. A global enable signal may be provided on the control line, where the enable signal is asserted during display intervals and is deasserted during touch intervals. The second TFT may be formed using a top-gate TFT or a bottom-gate TFT arrangement.
Public/Granted literature
- US20140232955A1 Display Circuitry with Reduced Pixel Parasitic Capacitor Coupling Public/Granted day:2014-08-21
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