Invention Grant
- Patent Title: Wiring substrate and semiconductor device
-
Application No.: US15056515Application Date: 2016-02-29
-
Publication No.: US09966331B2Publication Date: 2018-05-08
- Inventor: Takayuki Ota , Hiroharu Yanagisawa , Katsuya Fukase
- Applicant: Shinko Electric Industries Co., Ltd.
- Applicant Address: JP Nagano-shi, Nagano-ken
- Assignee: Shinko Electric Industries Co., Ltd.
- Current Assignee: Shinko Electric Industries Co., Ltd.
- Current Assignee Address: JP Nagano-shi, Nagano-ken
- Agency: Fish & Richardson P.C.
- Priority: JP2015-058415 20150320
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L25/10

Abstract:
The wiring substrate includes an insulation layer that includes a lower surface, an upper surface, and an intermediate surface located between the lower surface and the upper surface. A first wiring layer is formed on the lower surface of the insulation layer. A second wiring layer is formed on the intermediate surface of the insulation layer. A recess is formed in the upper surface of the insulation layer. The recess overlaps, in a plan view, a first through hole that extends through the insulation layer. The first through hole is filled with a via wiring, which is formed integrally with the first wiring layer. A bump is formed integrally with the via wiring and projected into the recess. An upper end surface of the bump is located above an upper surface of the second wiring layer.
Public/Granted literature
- US20160276255A1 WIRING SUBSTRATE AND SEMICONDUCTOR DEVICE Public/Granted day:2016-09-22
Information query
IPC分类: