An integrated circuit configured to detect a variation in a supply voltage using a phase of an input clock signal dependent on the variation in the supply voltage may include a clock delay circuit configured to delay the input clock signal output from a clock generator using each of different delay cell chains and generate a first delay clock signal and a second delay clock signal; and a phase controller configured to control a first phase so that a difference between the first phase and a second phase is 180 degrees, the first phase being a phase of the first delay clock signal, the second phase being a phase of the second delay clock signal.