- 专利标题： Front end circuit, module, and communication device
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申请号： US15610296申请日： 2017-05-31
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公开(公告)号： US09985681B2公开(公告)日： 2018-05-29
- 发明人: Tetsuo Saji , Yuki Endo , Nobuaki Matsuo
- 申请人： TAIYO YUDEN CO., LTD.
- 申请人地址： JP Tokyo
- 专利权人： TAIYO YUDEN CO., LTD.
- 当前专利权人： TAIYO YUDEN CO., LTD.
- 当前专利权人地址： JP Tokyo
- 代理机构： Chen Yoshimura LLP
- 优先权： JP2015-090663 20150427; JP2015-157557 20150807
- 主分类号： H04B1/44
- IPC分类号： H04B1/44 ; H04B1/40 ; H04B1/00 ; H04B15/02
摘要：
A module comprising: a first transmit filter that passes a transmission signal of a first band; a first receive filter that passes a reception signal of the first band; a second transmit filter that passes a transmission signal of a second band; a second receive filter that passes a reception signal of the second band; a third transmit filter that passes a transmission signal of a third band; and a third receive filter that passes a reception signal of the third band, wherein a transmit band of the first band overlaps with at least a part of a receive band of the second band, a receive band of the third band does not overlap with the transmit band of the first band or a transmit band of the second band, and the third receive filter is located between the first receive filter and the second receive filter.
公开/授权文献
- US20170272115A1 FRONT END CIRCUIT, MODULE, AND COMMUNICATION DEVICE 公开/授权日：2017-09-21
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