Invention Grant
- Patent Title: Memory tracking using copy-back cache for 1:1 device redundancy
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Application No.: US15588315Application Date: 2017-05-05
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Publication No.: US09990286B1Publication Date: 2018-06-05
- Inventor: Paul F. McLaughlin , William Russell Massey , Gary Drayton , Alexander Chernoguzov
- Applicant: HONEYWELL INTERNATIONAL INC.
- Applicant Address: US NJ Morris Plains
- Assignee: Honeywell International, Inc.
- Current Assignee: Honeywell International, Inc.
- Current Assignee Address: US NJ Morris Plains
- Agency: Jetter & Associates, P.A.
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F12/0806 ; G06F3/06 ; G06F12/0811 ; G05B23/02 ; G06F11/20

Abstract:
A redundant process controller arrangement includes a primary controller and parallel connected secondary controller each coupled to actuators and sensors coupled to processing equipment. The primary and secondary controllers include a main writable memory including a cache data control algorithm, central processing unit (CPU) with cache memory including cache not supporting write-thru, tracker logic coupled to a control cycle database in a tracked memory region and to a primary tracking buffer. A redundancy link is between the CPUs for passing tracked changes. The algorithm implements memory tracking using copy-back including the primary tracker logic each cycle writing tracked changes into the primary tracking buffer, and at cycle end, transferring tracked changes from the primary tracking buffer to the secondary controller over the redundancy link, and writing tracked changes to the secondary control database.
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