Invention Grant
- Patent Title: Semiconductor memory with respective power voltages for plurality of memory cells
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Application No.: US15336633Application Date: 2016-10-27
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Publication No.: US09997235B2Publication Date: 2018-06-12
- Inventor: Wei-Cheng Wu , Chih-Yu Lin , Kao-Cheng Lin , Wei-Min Chan , Yen-Huei Chen
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Maschoff Brennan
- Main IPC: G11C5/14
- IPC: G11C5/14 ; G11C7/00 ; G11C11/419

Abstract:
A device is disclosed that includes first memory cells, second memory cells, a first conductive line and a second conductive line. The first conductive line is electrically disconnected from the second conductive line. The first conductive line receives a first power voltage for the plurality of first memory cells. The second conductive line receives a second power voltage that is independent from the first power voltage, for the plurality of second memory cells.
Public/Granted literature
- US20170178719A1 SEMICONDUCTOR MEMORY Public/Granted day:2017-06-22
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