再颁专利
- 专利标题: Semiconductor memory
- 专利标题(中): 半导体存储器
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申请号: US09256500申请日: 1999-02-23
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公开(公告)号: USRE37176E1公开(公告)日: 2001-05-15
- 发明人: Kazuhiko Kajigaya , Katsuyuki Sato
- 申请人: Kazuhiko Kajigaya , Katsuyuki Sato
- 优先权: JP60-137733 19850626
- 主分类号: G11C700
- IPC分类号: G11C700
摘要:
A dynamic RAM is arranged such that a common data line in each of the non-selected ones of the divided memory arrays is connected to a pair of common source lines of a sense amplifier corresponding to the memory array concerned, whereby the potential of the common data line is set at a medium level which is substantially equal to the potential of the data lines by utilizing the medium potential of the pair of common source lines and a relatively large parasitic capacity thereof, thereby maintaining the data lines at the half-precharge level. The pair of common source lines are shorted to each other during the non-select period of the memory arrays, so that the common source lines have a medium level which is substantially equal to the half-precharge level of the data lines.
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