- 专利标题: Multi-state EEPROM having write-verify control circuit
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申请号: US11451589申请日: 2006-06-13
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公开(公告)号: USRE41019E1公开(公告)日: 2009-12-01
- 发明人: Tomoharu Tanaka , Gertjan Hemink
- 申请人: Tomoharu Tanaka , Gertjan Hemink
- 申请人地址: JP Kawasaki-shi
- 专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人地址: JP Kawasaki-shi
- 代理机构: Oblon, Spivak, McClelland, Maier & Neustadt, LLP
- 优先权: JP5-234767 19930921; JP5-311732 19931213
- 主分类号: G11C16/26
- IPC分类号: G11C16/26
摘要:
An EEPROM having a memory cell array in which electrically programmable memory cells are arranged in a matrix and each of the memory cells has three storage states, includes a plurality of data circuits for temporarily storing data for controlling write operation states of the plurality of memory cells, a write circuit for performing a write operation in accordance with the contents of the data circuits respectively corresponding to the memory cells, a write verify circuit for confirming states of the memory cells set upon the write operation, and a data updating circuit for updating the contents of the data circuits such that a rewrite operation is performed to only a memory cell, in which data is not sufficiently written, on the basis of the contents of the data circuits and the states of the memory cells set upon the write operation. A write operation, a write verify operation, and a data circuit content updating operation based on the contents of the data circuits are repeatedly performed until the memory cells are set in predetermined written states.
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