Invention Application
- Patent Title: PACKAGE FOR SEMICONDUCTOR CHIP
- Patent Title (中): 半导体芯片封装
-
Application No.: PCT/JP1994000571Application Date: 1994-04-06
-
Publication No.: WO1994023448A1Publication Date: 1994-10-13
- Inventor: TOKUYAMA CORPORATION
- Applicant: TOKUYAMA CORPORATION , MIYAHARA, Kenichiro
- Assignee: TOKUYAMA CORPORATION,MIYAHARA, Kenichiro
- Current Assignee: TOKUYAMA CORPORATION,MIYAHARA, Kenichiro
- Priority: JP5/79675 19930406; JP5/315382 19931215
- Main IPC: H01L23/04
- IPC: H01L23/04
Abstract:
A package for a semiconductor chip having the following features: (a) a power-supply layer, a ground layer, and a signal layer are formed in multilayer through intermediate layers including insulating layers; (b) the power-supply layer and ground layer each comprise an inner lead region exposed from the intermediate layers, an outer lead region, and a conductive region sandwiched by these two regions and covered by the intermediate layers; and (c) the conductive regions of the power-supply layer and ground layer consist of planar conductive members. The self-inductances of the power-supply and ground layers of this package are low, and the capacitance of the capacitor formed by these layers is low. Therefore, the noise of the power-supply system is little.
Information query
IPC分类: