Invention Application
WO2004061678A3 FORWARD STATE FOR USE IN CACHE COHERENCY IN A MULTIPROCESSOR SYSTEM 审中-公开
用于多处理器系统中的高速缓存中的前向状态

  • Patent Title: FORWARD STATE FOR USE IN CACHE COHERENCY IN A MULTIPROCESSOR SYSTEM
  • Patent Title (中): 用于多处理器系统中的高速缓存中的前向状态
  • Application No.: PCT/US0338347
    Application Date: 2003-12-03
  • Publication No.: WO2004061678A3
    Publication Date: 2005-02-03
  • Inventor: HUM HERBERTGOODMAN JAMES A
  • Applicant: INTEL CORP
  • Assignee: INTEL CORP
  • Current Assignee: INTEL CORP
  • Priority: US32506902 2002-12-19
  • Main IPC: G06F12/08
  • IPC: G06F12/08
FORWARD STATE FOR USE IN CACHE COHERENCY IN A MULTIPROCESSOR SYSTEM
Abstract:
Described herein is a cache coherency protocol having five states: Modified, Exclusive, Shared, Invalid and Forward (MESIF). The MESIF cache coherency protocol includes a Forward (F) state that designates a single copy of data from which further copies can be made. A cache line in the F state is used to respond to request for a copy of the cache line. In one embodiment, the newly created copy is placed in the F state and the cache line previously in the F state is put in the Shared (S) state, or the Invalid (I) state. Thus, if the cache line is shared, one shared copy is in the F state and the remaining copies of the cache line are in the S state.
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