In one embodiment, a Walsh-Hadamard decoder can have a hardware efficient Fast Hadamard Transform ("FHT") engine. In one embodiment, the FHT engine can include an input to receive an input sequence to be decoded into a Walsh-Hadamard codeword. The FHT engine can further include a controller to correlate the received input sequence with a plurality of Walsh- Hadamard codewords using two, add/subtract modules. In one embodiment, the two add/subtract modules operate in parallel.