Invention Application
- Patent Title: TRANSIENT BLOCKING UNIT HAVING SHUNT FOR OVER-VOLTAGE PROTECTION
- Patent Title (中): 具有过压保护的瞬态闭锁单元
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Application No.: PCT/US2006/043102Application Date: 2006-11-03
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Publication No.: WO2007058799A2Publication Date: 2007-05-24
- Inventor: HARRIS, Richard, A. , HEBERT, Francois
- Applicant: FULTEC SEMICONDUCTOR, INC. , HARRIS, Richard, A. , HEBERT, Francois
- Applicant Address: 2029 STIERLIN COURT, SUITE 120, Mountain View, CA 94043 US
- Assignee: FULTEC SEMICONDUCTOR, INC.,HARRIS, Richard, A.,HEBERT, Francois
- Current Assignee: FULTEC SEMICONDUCTOR, INC.,HARRIS, Richard, A.,HEBERT, Francois
- Current Assignee Address: 2029 STIERLIN COURT, SUITE 120, Mountain View, CA 94043 US
- Agency: JACOBS, Ron et al.
- Priority: US60/735,667 20051110; US11/331,836 20060112
- Main IPC: H02H3/22
- IPC: H02H3/22
Abstract:
A transient blocking unit (TBU) having improved damage resistance is provided. A TBU includes two or more depletion mode transistors arranged to provide a low series impedance in normal operation and a high series impedance when the input current exceeds a predetermined threshold. At least one of the TBU transistors is a protecting device having a shunt circuit element connected in parallel with its channel. When the TBU is in its high impedance state, the shunt circuit element provides a current path, thereby decreasing terminal voltages on at least one of the TBU transistors. The shunt element can be a discrete or integrated resistor, a current source including a transistor, or an appropriately engineered device parasitic.
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