Invention Application
WO2008121734A1 METHOD AND APPARATUS FOR ADVANCED ENCRYPTION STANDARD (AES) BLOCK CIPHER
审中-公开
高级加密标准（AES）块式芯片的方法和装置
- Patent Title: METHOD AND APPARATUS FOR ADVANCED ENCRYPTION STANDARD (AES) BLOCK CIPHER
- Patent Title (中): 高级加密标准（AES）块式芯片的方法和装置
-
Application No.: PCT/US2008/058505Application Date: 2008-03-27
-
Publication No.: WO2008121734A1Publication Date: 2008-10-09
- Inventor: GOPAL, Vinodh , WOLRICH, Gilbert , FEGHALI, Wajdi , OZTURK, Erdinc , YAP, Kirk S.
- Applicant: INTEL CORPORATION , GOPAL, Vinodh , WOLRICH, Gilbert , FEGHALI, Wajdi , OZTURK, Erdinc , YAP, Kirk S.
- Applicant Address: 2200 Mission College Boulevard Santa Clara, California 95052 US
- Assignee: INTEL CORPORATION,GOPAL, Vinodh,WOLRICH, Gilbert,FEGHALI, Wajdi,OZTURK, Erdinc,YAP, Kirk S.
- Current Assignee: INTEL CORPORATION,GOPAL, Vinodh,WOLRICH, Gilbert,FEGHALI, Wajdi,OZTURK, Erdinc,YAP, Kirk S.
- Current Assignee Address: 2200 Mission College Boulevard Santa Clara, California 95052 US
- Agency: VINCENT, Lester J. et al.
- Priority: US11/731,158 20070330
- Main IPC: H04L9/14
- IPC: H04L9/14
Abstract:
The speed at which encrypt and decrypt operations may be performed in a general purpose processor is increased by providing a separate encrypt data path and decrypt data path. With separate data paths, each of the data paths may be individually optimized in order to reduce delays in a critical path. In addition, delays may be hidden in a non-critical last round.
Information query
