Invention Application
WO2009140244A3 PACKAGED ELECTRONIC DEVICES WITH FACE-UP DIE HAVING THROUGH SUBSTRATE VIA CONNECTION TO LEADS AND DIE PAD
审中-公开
包装电子设备,具有通过基板通过基座连接到引线和垫片
- Patent Title: PACKAGED ELECTRONIC DEVICES WITH FACE-UP DIE HAVING THROUGH SUBSTRATE VIA CONNECTION TO LEADS AND DIE PAD
- Patent Title (中): 包装电子设备,具有通过基板通过基座连接到引线和垫片
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Application No.: PCT/US2009043564Application Date: 2009-05-12
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Publication No.: WO2009140244A3Publication Date: 2010-03-04
- Inventor: BONIFIELD THOMAS D , MORRISON GARY P , DUNNE RAJIV , CHAUHAN SATYENDRA S , MURTUZA MASOOD
- Applicant: TEXAS INSTRUMENTS INC , BONIFIELD THOMAS D , MORRISON GARY P , DUNNE RAJIV , CHAUHAN SATYENDRA S , MURTUZA MASOOD
- Assignee: TEXAS INSTRUMENTS INC,BONIFIELD THOMAS D,MORRISON GARY P,DUNNE RAJIV,CHAUHAN SATYENDRA S,MURTUZA MASOOD
- Current Assignee: TEXAS INSTRUMENTS INC,BONIFIELD THOMAS D,MORRISON GARY P,DUNNE RAJIV,CHAUHAN SATYENDRA S,MURTUZA MASOOD
- Priority: US5245608 2008-05-12
- Main IPC: H01L23/12
- IPC: H01L23/12 ; A61B5/02 ; H05K1/02
Abstract:
A packaged electronic device (100) includes a leadframe (130) including a die pad (135), a first, second, and third lead pin (131, 132) surrounding the die pad. An IC die (105) is assembled in a face-up configuration on the lead frame. The IC die includes a substrate (104) having an active top surface (118) and a bottom surface (119), wherein the top surface includes integrated circuitry (120) including an input pad, an output pad, a power supply pad, and a ground pad, and a plurality of through-substrate vias (TSVs) (110) including an electrically conductive filler material (111) and a dielectric liner (112). The TSVs couple the input pad (116) to the first lead pin, the output pad to the second lead pin, the power supply pad (115) to a third lead pin or a portion of the die pad. A fourth TSV (110(c)-(f)) couples pads (117(a)-(d)) coupled to the ground node of the IC to the die pad or a portion of the die pad for a split die pad.
Information query
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