Interconnection switch (2) of programmable logic array, comprising input ports grouping together a plurality of inputs (I, I') and output ports grouping together a plurality of outputs (0, 0' ), the inputs and the outputs being linked to a linking tree structure descending from the inputs to the outputs and comprising routing elements (4, 5, 6) organized in several levels so as to link through a unique path each input of all the input ports to at least one output of each output port. Interconnection switch, logic unit and programmable logic array comprising the latter two, which are designed to define a unique path between two points of the array.