A semiconductor device wherein at least one transistor cell is provided in a silicon carbide (SiC) substrate (1) of a first conductivity type. Each transistor cell is provided with: a well region (3) of a second conductivity type, which is formed in the first surface of the SiC substrate (1); a source region (4) configured from a region of the first conductivity type, which is formed within the well region (3); a gate electrode (7) formed thereupon with a gate-insulating film (6) interposed therebetween; a source electrode (5) formed so as to contact the source region (4); and a drain electrode (9) formed on the second surface side of the SiC substrate (1). The semiconductor device is further provided with a region (3p) of the second conductivity type, which is located to the outside of the outermost transistor cells, surrounds the well regions (3) at positions adjacent thereto, and is insulated from the gate electrode (7) and the source electrode (5). As a result of this configuration, it is possible to reduce the leakage current when applying a high voltage.