Invention Application
WO2012145025A2 SOURCE/DRAIN EXTENSION CONTROL FOR ADVANCED TRANSISTORS 审中-公开
高级晶体管的源/漏极扩展控制

SOURCE/DRAIN EXTENSION CONTROL FOR ADVANCED TRANSISTORS
Abstract:
A planar transistor with improved performance has a source and a drain on a semiconductor substrate that includes a substantially undoped channel extending between the source and the drain. A gate is positioned over the substantially undoped channel on the substrate. Implanted source/drain extensions contact the source and the drain, with the implanted source/drain extensions having a dopant concentration of less than about 1 x 10 19 atoms/cm 3 ', or alternatively, less than one-quarter the dopant concentration of the source and the drain.
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