Invention Application
- Patent Title: SOURCE/DRAIN EXTENSION CONTROL FOR ADVANCED TRANSISTORS
- Patent Title (中): 高级晶体管的源/漏极扩展控制
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Application No.: PCT/US2011/062495Application Date: 2011-11-30
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Publication No.: WO2012145025A2Publication Date: 2012-10-26
- Inventor: RANADE, Pushkar , SHIFREN, Lucian , SONKUSALE, Sachin, R.
- Applicant: SUVOLTA, INC. , RANADE, Pushkar , SHIFREN, Lucian , SONKUSALE, Sachin, R.
- Applicant Address: 130 Knowles Drive, Suite D Los Gatos, CA 95032-1832 US
- Assignee: SUVOLTA, INC.,RANADE, Pushkar,SHIFREN, Lucian,SONKUSALE, Sachin, R.
- Current Assignee: SUVOLTA, INC.,RANADE, Pushkar,SHIFREN, Lucian,SONKUSALE, Sachin, R.
- Current Assignee Address: 130 Knowles Drive, Suite D Los Gatos, CA 95032-1832 US
- Agency: FISH, Charles, S.
- Priority: US12/960,289 20101203
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L29/10
Abstract:
A planar transistor with improved performance has a source and a drain on a semiconductor substrate that includes a substantially undoped channel extending between the source and the drain. A gate is positioned over the substantially undoped channel on the substrate. Implanted source/drain extensions contact the source and the drain, with the implanted source/drain extensions having a dopant concentration of less than about 1 x 10 19 atoms/cm 3 ', or alternatively, less than one-quarter the dopant concentration of the source and the drain.
Information query
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