Invention Application
WO2013002789A1 METHOD AND APPARATUS FOR MEMORY ENCRYPTION WITH INTEGRITY CHECK AND PROTECTION AGAINST REPLAY ATTACKS
审中-公开
用于内容加密的方法和装置，具有完整的检查和防止重复攻击的保护
- Patent Title: METHOD AND APPARATUS FOR MEMORY ENCRYPTION WITH INTEGRITY CHECK AND PROTECTION AGAINST REPLAY ATTACKS
- Patent Title (中): 用于内容加密的方法和装置，具有完整的检查和防止重复攻击的保护
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Application No.: PCT/US2011/042413Application Date: 2011-06-29
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Publication No.: WO2013002789A1Publication Date: 2013-01-03
- Inventor: GUERON, Shay , SAVAGAONKAR, Uday , MCKEEN, Francis X. , ROZAS, Carlos V. , DURHAM, David M. , DOWECK, Jacob , MULLA, Ofir , ANATI, Ittai , GREENFIELD, Zvika , MAOR, Moshe
- Applicant: INTEL CORPORATION , GUERON, Shay , SAVAGAONKAR, Uday , MCKEEN, Francis X. , ROZAS, Carlos V. , DURHAM, David M. , DOWECK, Jacob , MULLA, Ofir , ANATI, Ittai , GREENFIELD, Zvika , MAOR, Moshe
- Applicant Address: 2200 Mission College Boulevard MS: RNB-4-150 Santa Clara, California 95052 US
- Assignee: INTEL CORPORATION,GUERON, Shay,SAVAGAONKAR, Uday,MCKEEN, Francis X.,ROZAS, Carlos V.,DURHAM, David M.,DOWECK, Jacob,MULLA, Ofir,ANATI, Ittai,GREENFIELD, Zvika,MAOR, Moshe
- Current Assignee: INTEL CORPORATION,GUERON, Shay,SAVAGAONKAR, Uday,MCKEEN, Francis X.,ROZAS, Carlos V.,DURHAM, David M.,DOWECK, Jacob,MULLA, Ofir,ANATI, Ittai,GREENFIELD, Zvika,MAOR, Moshe
- Current Assignee Address: 2200 Mission College Boulevard MS: RNB-4-150 Santa Clara, California 95052 US
- Agency: VINCENT, Lester J. et al.
- Main IPC: G06F21/24
- IPC: G06F21/24 ; G06F21/02 ; G06F12/14
Abstract:
A method and apparatus to provide cryptographic integrity checks and replay protection to protect against hardware attacks on system memory is provided. A mode of operation for block ciphers enhances the standard XTS-AES mode of operation to perform memory encryption by extending a tweak to include a "time stamp" indicator. A tree-based replay protection scheme uses standard XTS-AES to encrypt contents of a cache line in the system memory. A Message-Authentication Code (MAC) for the cache line is encrypted using enhanced XTS-AES and a "time stamp" indicator associated with the cache line. The "time stamp indicator" is stored in a processor.
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