Invention Application
- Patent Title: FIN ISOLATION IN MULTI-GATE FIELD EFFECT TRANSISTORS
- Patent Title (中): 多栅极场效应晶体管中的FIN隔离
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Application No.: PCT/US2013/068633Application Date: 2013-11-06
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Publication No.: WO2014081569A1Publication Date: 2014-05-30
- Inventor: CHENG, Kangguo , HARAN, Balasubramanian, S. , KHAKIFIROOZ, Ali , PONOTH, Shom , STANDAERT, Theodorus , YAMASHITA, Tenko
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: New Orchard Road Armonk, NY 10504 US
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: New Orchard Road Armonk, NY 10504 US
- Agency: IVERS, Catherine
- Priority: US13/684,818 20121126
- Main IPC: H01L21/336
- IPC: H01L21/336
Abstract:
A method for fabricating a field effect transistor (FET) device includes forming a plurality of semiconductor fins (302) on a substrate (202), removing a semiconductor fin of the plurality of semiconductor fins from a portion of the substrate, forming an isolation fin (1002) that includes a dielectric material (902) on the substrate on the portion of the substrate, and forming a gate stack (1701) over the plurality of semiconductor fins (302) and the isolation fin (1002).
Information query
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