Invention Application
- Patent Title: SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
- Patent Title (中): 半导体器件及其制造方法
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Application No.: PCT/JP2014/006359Application Date: 2014-12-22
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Publication No.: WO2015098073A1Publication Date: 2015-07-02
- Inventor: SEKIGUCHI, Ryota , OUCHI, Toshihiko
- Applicant: CANON KABUSHIKI KAISHA
- Applicant Address: 30-2, Shimomaruko 3-chome, Ohta-ku, Tokyo 1468501 JP
- Assignee: CANON KABUSHIKI KAISHA
- Current Assignee: CANON KABUSHIKI KAISHA
- Current Assignee Address: 30-2, Shimomaruko 3-chome, Ohta-ku, Tokyo 1468501 JP
- Agency: ABE, Takuma et al.
- Priority: JP2013-267156 20131225; JP2014-245236 20141203
- Main IPC: H01L27/144
- IPC: H01L27/144 ; G01N21/3581 ; H01L31/108 ; H01L31/112 ; H01L31/18 ; H01L29/872 ; H01L27/07
Abstract:
A semiconductor device includes a silicon substrate and a detection element and p-type and n-type MOS transistors, which are arranged on the silicon substrate, wherein the detection element includes a semiconductor layer, electrodes, and a Schottkey barrier disposed therebetween, the semiconductor layer is arranged just above a layer having the same composition and height as those of an impurity diffusion layer in the source or drain of the p-type or n-type MOS transistor, a region, in the silicon substrate, having the same composition and height as those of a channel region, in the silicon substrate, just below a gate oxide film of the p-type MOS transistor or the n-type MOS transistor, or a region, in the silicon substrate, having the same composition and height as those of a region just below a field oxide film disposed between the p-type and the n-type MOS transistor.
Information query
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