Invention Application
WO2016022975A1 METHODS AND APPARATUS FOR LDMOS DEVICES WITH CASCADED RESURF IMPLANTS AND DOUBLE BUFFERS
审中-公开
LDMOS设备的方法和设备，具有嵌入式固定植入和双重缓冲
- Patent Title: METHODS AND APPARATUS FOR LDMOS DEVICES WITH CASCADED RESURF IMPLANTS AND DOUBLE BUFFERS
- Patent Title (中): LDMOS设备的方法和设备，具有嵌入式固定植入和双重缓冲
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Application No.: PCT/US2015/044317Application Date: 2015-08-07
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Publication No.: WO2016022975A1Publication Date: 2016-02-11
- Inventor: CAI, Jun
- Applicant: TEXAS INSTRUMENTS INCORPORATED , TEXAS INSTRUMENTS JAPAN LIMITED
- Applicant Address: P.O. Box 655474, Mail Station 3999 Dallas, TX 75265-5474 US
- Assignee: TEXAS INSTRUMENTS INCORPORATED,TEXAS INSTRUMENTS JAPAN LIMITED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED,TEXAS INSTRUMENTS JAPAN LIMITED
- Current Assignee Address: P.O. Box 655474, Mail Station 3999 Dallas, TX 75265-5474 US
- Agency: DAVIS, Michael, A., Jr. et al.
- Priority: US62/034,378 20140807; US14/808,991 20150724
- Main IPC: H01L29/80
- IPC: H01L29/80
Abstract:
In described examples, an LDMOS device (1200) includes at least one drift region (1222) disposed in a portion of a semiconductor substrate (1210); at least one isolation structure (1252) at a surface of the semiconductor substrate (1210); a D-well region positioned adjacent a portion of the at least one drift region (1222), and an intersection of the drift region (1222) and the D-well region forming a junction (1226) between first and second conductivity types; a gate structure (1282) disposed over the semiconductor substrate (1210); a source contact region (S) disposed on the surface of the D-well region; a drain contact region (D) disposed adjacent the isolation structure (1252); and a double buffer region including a first buried layer (1228) lying beneath the D-well region and the drift region (1222) and doped to the second conductivity type, and a second high voltage deep diffusion layer (1218) lying beneath the first buried layer (1228) and doped to the first conductivity type.
Information query
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