Invention Application
WO2016044179A2 ELECTRONIC STRUCTURES STRENGTHENED BY POROUS AND NON-POROUS LAYERS, AND METHODS OF FABRICATION 审中-公开
由多孔和非多孔层增强的电子结构以及制造方法

  • Patent Title: ELECTRONIC STRUCTURES STRENGTHENED BY POROUS AND NON-POROUS LAYERS, AND METHODS OF FABRICATION
  • Patent Title (中): 由多孔和非多孔层增强的电子结构以及制造方法
  • Application No.: PCT/US2015050026
    Application Date: 2015-09-14
  • Publication No.: WO2016044179A2
    Publication Date: 2016-03-24
  • Inventor: UZOH CYPRIAN EMEKAKATKAR RAJESH
  • Applicant: INVENSAS CORP
  • Assignee: INVENSAS CORP
  • Current Assignee: INVENSAS CORP
  • Priority: US201462050728 2014-09-15
  • Main IPC: H01L25/07
  • IPC: H01L25/07
ELECTRONIC STRUCTURES STRENGTHENED BY POROUS AND NON-POROUS LAYERS, AND METHODS OF FABRICATION
Abstract:
Integrated circuits (ICs 110) are attached to a wafer (120W). A stabilization layer (404) is formed over the wafer to strengthen the structure for further processing. Unlike a conventional mold compound, the stabilization layer is separated from at least some wafer areas around the ICs by one or more gap regions (450) to reduce the thermo- mechanical stress on the wafer and hence the wafer warpage. Alternatively or in addition, the stabilization layer can be a porous material having a low horizontal elastic modulus to reduce the wafer warpage, but having a high flexural modulus to reduce warpage and otherwise strengthen the structure for further processing. Other features and advantages are also provided.
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