Invention Application
- Patent Title: ADJUSTABLE BUFFER CIRCUIT
- Patent Title (中): 可调缓存电路
-
Application No.: PCT/US2015/063211Application Date: 2015-12-01
-
Publication No.: WO2016164075A1Publication Date: 2016-10-13
- Inventor: ZHANG, Wenfeng , UPADHYAYA, Parag
- Applicant: XILINX, INC.
- Applicant Address: Attn: Legal Dept. 2100 Logic Drive San Jose, CA 95124 US
- Assignee: XILINX, INC.
- Current Assignee: XILINX, INC.
- Current Assignee Address: Attn: Legal Dept. 2100 Logic Drive San Jose, CA 95124 US
- Agency: HSU, Frederick et al.
- Priority: US14/681,898 20150408
- Main IPC: H03K19/0185
- IPC: H03K19/0185 ; H03K19/094
Abstract:
A common mode logic buffer device includes a current source (112) configured to provide a source current. An input stage includes a first MOS transistor pair (110) configured to generate, from the source current and based upon an input differential voltage, a differential current between two output paths. An output stage includes a second MOS transistor pair (106) configured to generate an output differential voltage based upon an effective impedance provided for the each of the two output paths. An adjustment circuit (104, 108) is configured to adjust, in response to a control signal, the effective impedance of the second MOS transistor pair (106).
Information query
IPC分类:
