Invention Application
- Patent Title: SUBMICRON WAFER ALIGNMENT
- Patent Title (中): 子波形对准
-
Application No.: PCT/US2016/039102Application Date: 2016-06-23
-
Publication No.: WO2017023442A1Publication Date: 2017-02-09
- Inventor: GEORGIEV, Todor Georgiev
- Applicant: QUALCOMM INCORPORATED
- Applicant Address: ATTN: International IP Administration 5775 Morehouse Drive San Diego, California 92121-1714 US
- Assignee: QUALCOMM INCORPORATED
- Current Assignee: QUALCOMM INCORPORATED
- Current Assignee Address: ATTN: International IP Administration 5775 Morehouse Drive San Diego, California 92121-1714 US
- Agency: ABUMERI, Mark M.
- Priority: US62/202,120 20150806; US15/188,635 20160621
- Main IPC: G02B13/00
- IPC: G02B13/00 ; G01M11/00 ; G02B27/10 ; G02B27/14 ; G02B27/62
Abstract:
Certain aspects relate to systems and techniques for submicron alignment in wafer optics. One disclosed method of alignment between wafers to produce an integrated lens stack employs a beam splitter (that is, a 50% transparent mirror) that reflects the alignment mark of the top wafer when the microscope objective is focused on the alignment mark of the bottom wafer. Another disclosed method of alignment between wafers to produce an integrated lens stack implements complementary patterns that can produce a Moiré effect when misaligned in order to aid in visually determining proper alignment between the wafers. In some embodiments, the methods can be combined to increase precision.
Information query