The present disclosure provides an array substrate. The array substrate includes a substrate (8) having a display region with a plurality of pixel regions, each pixel region having two or more first regions; a common electrode line (4) between two adjacent pixel regions; a gate line (1); a data line (3) intersecting with the gate line (1); at least one of the gate line (1) and the data line (3) being in a second region between two adjacent first regions; and a pixel electrode having a hollowed-out pattern within a corresponding first region, pixel electrodes corresponding to the two or more first regions being a pixel electrode unit (5).