Invention Application
- Patent Title: MEMORY GATE DRIVER TECHNOLOGY FOR FLASH MEMORY CELLS
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Application No.: PCT/US2018/048138Application Date: 2018-08-27
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Publication No.: WO2019046189A1Publication Date: 2019-03-07
- Inventor: VARKONY, Roni , BETSER, Yoram
- Applicant: CYPRESS SEMICONDUCTOR CORPORATION
- Applicant Address: 198 Champion Court San Jose, California 95134 US
- Assignee: CYPRESS SEMICONDUCTOR CORPORATION
- Current Assignee: CYPRESS SEMICONDUCTOR CORPORATION
- Current Assignee Address: 198 Champion Court San Jose, California 95134 US
- Agency: DRAGANOFF, Stoycho
- Priority: US62/551,947 20170830; US15/925,510 20180319
- Main IPC: G11C16/12
- IPC: G11C16/12 ; G11C16/14 ; H01L27/11563
Abstract:
A memory array including a first memory cell including a first memory gate coupled to receive a first signal. The memory array including a second memory cell including a first memory gate coupled to receive a second signal. The magnitude of the second signal is different than the magnitude of the first signal. The memory array including a third memory cell including a first memory gate coupled to receive a third signal. The magnitude of the third signal is different than the magnitude of the first signal and the magnitude of the second signal. The first signal, the second signal and the third signal are received concurrently.
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