Invention Application
- Patent Title: THREE-DIMENSIONAL PHASE CHANGE MEMORY ARRAY INCLUDING DISCRETE MIDDLE ELECTRODES AND METHODS OF MAKING THE SAME
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Application No.: PCT/US2019/019879Application Date: 2019-02-27
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Publication No.: WO2019236162A1Publication Date: 2019-12-12
- Inventor: ZHOU, Fei , MAKALA, Raghuveer S. , PETTI, Christopher J. , SHARANGPANI, Rahul , RAJASHEKHAR, Adarsh , YANG, Seung-Yeul
- Applicant: SANDISK TECHNOLOGIES LLC
- Applicant Address: 5080 Spectrum Drive Suite 1050W Addison, Texas 75001 US
- Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee Address: 5080 Spectrum Drive Suite 1050W Addison, Texas 75001 US
- Agency: RADOMSKY, Leon et al.
- Priority: US16/002,169 20180607; US16/002,243 20180607
- Main IPC: H01L45/00
- IPC: H01L45/00
Abstract:
Alternating stacks of insulating strips and sacrificial material strips are formed over a substrate. A laterally alternating sequence of pillar cavities and pillar structures can be formed within each of the line trenches. A phase change memory cell including a discrete metal portion, a phase change memory material portion, and a selector material portion is formed at each level of the sacrificial material strips at a periphery of each of the pillar cavities. Vertical bit lines are formed in the two-dimensional array of pillar cavities. Remaining portions of the sacrificial material strips are replaced with electrically conductive word line strips. Pathways for providing an isotropic etchant for the sacrificial material strips and a reactant for a conductive material of the electrically conductive word line strips may be provided by a backside trench, or by removing the pillar structures to provide backside openings.
Information query
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