• Patent Title: MULTI-STAGE EQUALIZER FOR INTER-SYMBOL INTERFERENCE CANCELLATION
  • Application No.: PCT/US2019/044491
    Application Date: 2019-07-31
  • Publication No.: WO2020036740A1
    Publication Date: 2020-02-20
  • Inventor: CHOUDHARY, PrashantWANG, Nanyan
  • Applicant: RAMBUS INC.
  • Applicant Address: 1050 Enterprise Way, Suite 700 Sunnyvale, CA 94089 US
  • Assignee: RAMBUS INC.
  • Current Assignee: RAMBUS INC.
  • Current Assignee Address: 1050 Enterprise Way, Suite 700 Sunnyvale, CA 94089 US
  • Agency: BEHIEL, Arthur, J.
  • Priority: US62/765,109 20180817; US62/778,622 20181212
  • Main IPC: H04L25/03
  • IPC: H04L25/03 H04B1/16
MULTI-STAGE EQUALIZER FOR INTER-SYMBOL INTERFERENCE CANCELLATION
Abstract:
An equalizer includes a first feed-forward stage that provides a measure of low-frequency IS I and a second feed-forward stage that includes a cascade of stages each making an IS I estimate. The IS I estimate from each stage is further equalized by application of the measures of low- frequency IS I from the first feed-forward stage and fed to the next in the cascade of stages. The IS I estimates from the stages thus become progressively more accurate. The number of stages applied to a given signal can be optimized to achieve a suitably low bit-error rate. Power is saved by disabling stages which are not required to meet that goal.
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