The present application relates to the technical field of communications, and provides a stacked interconnect architecture and an electronic device. The stacked interconnect architecture comprises two or more circuit board assemblies, and each circuit board assembly comprises a circuit board, a connector mounted on a board surface of the circuit board, a central processing unit, and other electronic components. Connectors on two adjacent circuit boards are correspondingly inserted to form a connection structure between the circuit board assemblies. Two central processing units distributed in the same circuit board assembly are electrically connected by means of an in-board wiring, and two central processing units distributed in different circuit board assemblies are electrically connected by means of the in-board wiring and the connection structure between the two circuit board assemblies. The stacked interconnect architecture simplifies the structure, reduces the link loss, improves the signal rate, improves the integrated level, reduces the height of the interconnect architecture, and reduces the occupied space.