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公开(公告)号：EP0755148A2
公开(公告)日：1997-01-22
申请号：EP96305202.2
申请日：1996-07-16
发明人： Yaguchi, Hiroyuki , Mori, Akihito , Miyamoto, Ryosuke , Takiyama, Yasuhiro , Kohtani, Hideto , Suzuki, Katsunari , Shimizu, Hideaki , Takahashi, Tadashi , Yoshida, Hiroyoshi , Moriyama, Tsuyoshi , Watanabe, Masao
IPC分类号： H04N1/41
CPC分类号： H04N1/32448 , G06T9/004 , H04N1/17 , H04N1/32358 , H04N2201/0081 , H04N2201/0082 , H04N2201/3287 , H04N2201/3288
摘要： An image processing apparatus includes a read unit for reading a document sheet to generate image data, a data compression unit for compressing the image data generated by the read unit, a prediction unit for predicting data amount after the compression for the image data to be compressed by the data compression unit and a control unit for controlling the reading of the document sheet by the read means in accordance with the prediction result by the prediction means.
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2.发明公开
公开(公告)号：EP0973326A2
公开(公告)日：2000-01-19
申请号：EP99305606.8
申请日：1999-07-15
发明人： Kohtani, Hideto , Nonaka, Takashi
IPC分类号： H04N1/32
CPC分类号： H04N1/00912 , H04N1/32561 , H04N2201/0081 , H04N2201/0082
摘要： The image formation by the plural-image formation mode is manually inhibited by the user in case the image formation is interrupted or the formed image is distorted by defective original feeding in the image formation by such plural-image formation mode. As a result, image formation of high quality can be achieved without trouble. The configuration for this purpose is featured by manually inhibiting the plural-image formation mode by depression of a touch key on an operation unit.
摘要翻译： 在通过这种多图像形成模式进行图像形成的情况下，图像形成被中断或形成的图像由于缺陷的原稿进给而失真的情况下，由用户手动禁止通过多图像形成模式的图像形成。 结果，可以无故障地实现高质量的图像形成。 用于该目的的结构的特征在于通过按压操作单元上的触摸键来手动禁止多图像形成模式。
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公开(公告)号：EP0985983B1
公开(公告)日：2004-11-24
申请号：EP99307084.6
申请日：1999-09-07
发明人： Kohtani, Hideto , Muto, Tsuyoshi
CPC分类号： G07F7/02 , G03G21/02 , G06Q20/343
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公开(公告)号：EP0973326A3
公开(公告)日：2000-11-22
申请号：EP99305606.8
申请日：1999-07-15
发明人： Kohtani, Hideto , Nonaka, Takashi
IPC分类号： H04N1/32
CPC分类号： H04N1/00912 , H04N1/32561 , H04N2201/0081 , H04N2201/0082
摘要： The image formation by the plural-image formation mode is manually inhibited by the user in case the image formation is interrupted or the formed image is distorted by defective original feeding in the image formation by such plural-image formation mode. As a result, image formation of high quality can be achieved without trouble. The configuration for this purpose is featured by manually inhibiting the plural-image formation mode by depression of a touch key on an operation unit.
摘要翻译： 通过多图像形成模式的图像形成在用户通过这种多图像形成模式的图像形成中断图像形成的情况下被手动禁止或者形成的图像由于原稿馈送缺陷而失真。 结果，可以毫无问题地实现高质量的图像形成。 为此目的的配置的特征在于通过按下操作单元上的触摸键来手动禁止多图像形成模式。
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公开(公告)号：EP0755148A3
公开(公告)日：1998-03-04
申请号：EP96305202.2
申请日：1996-07-16
发明人： Yaguchi, Hiroyuki , Mori, Akihito , Miyamoto, Ryosuke , Takiyama, Yasuhiro , Kohtani, Hideto , Suzuki, Katsunari , Shimizu, Hideaki , Takahashi, Tadashi , Yoshida, Hiroyoshi , Moriyama, Tsuyoshi , Watanabe, Masao
IPC分类号： H04N1/41
CPC分类号： H04N1/32448 , G06T9/004 , H04N1/17 , H04N1/32358 , H04N2201/0081 , H04N2201/0082 , H04N2201/3287 , H04N2201/3288
摘要： An image processing apparatus includes a read unit for reading a document sheet to generate image data, a data compression unit for compressing the image data generated by the read unit, a prediction unit for predicting data amount after the compression for the image data to be compressed by the data compression unit and a control unit for controlling the reading of the document sheet by the read means in accordance with the prediction result by the prediction means.
摘要翻译： 一种图像处理设备包括：读取单元，用于读取文档片以生成图像数据;数据压缩单元，用于压缩由读取单元生成的图像数据;预测单元，用于预测压缩后的数据量以用于要压缩的图像数据 由数据压缩单元和控制单元根据预测装置的预测结果控制读取装置读取文件页。
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公开(公告)号：EP0973326B1
公开(公告)日：2006-10-04
申请号：EP99305606.8
申请日：1999-07-15
发明人： Kohtani, Hideto , Nonaka, Takashi
IPC分类号： H04N1/32
CPC分类号： H04N1/00912 , H04N1/32561 , H04N2201/0081 , H04N2201/0082
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公开(公告)号：EP0755148B1
公开(公告)日：2002-09-25
申请号：EP96305202.2
申请日：1996-07-16
发明人： Yaguchi, Hiroyuki , Mori, Akihito , Miyamoto, Ryosuke , Takiyama, Yasuhiro , Kohtani, Hideto , Suzuki, Katsunari , Shimizu, Hideaki , Takahashi, Tadashi , Yoshida, Hiroyoshi , Moriyama, Tsuyoshi , Watanabe, Masao
CPC分类号： H04N1/32448 , G06T9/004 , H04N1/17 , H04N1/32358 , H04N2201/0081 , H04N2201/0082 , H04N2201/3287 , H04N2201/3288
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8.发明公开Counting apparatus, and computer readable memory medium 有权Zählapparat和Rechnerlesbares Speichermedium
公开(公告)号：EP0985983A3
公开(公告)日：2001-03-07
申请号：EP99307084.6
申请日：1999-09-07
发明人： Kohtani, Hideto , Muto, Tsuyoshi
CPC分类号： G07F7/02 , G03G21/02 , G06Q20/343
摘要： A counting apparatus comprising an execution detection circuit for detecting the execution of a predetermined operation; plural memory circuits for commonly storing the information on the number of execution at each detection of the execution; a destruction detection circuit for detecting, at the storage of the information, whether the information stored in each memory circuit is destructed; and a correction circuit adapted, upon detection that the information of a memory circuit is destructed, to correct the destructed information with the information of another memory circuit.
摘要翻译： 一种计数装置，包括用于检测预定操作的执行的执行检测电路; 多个存储电路，用于在每次执行检测时共同存储关于执行次数的信息; 破坏检测电路，用于在存储信息时检测存储在每个存储器电路中的信息是否被破坏; 以及校正电路，当检测到存储器电路的信息被破坏时，适配用另一个存储器电路的信息来校正被破坏的信息。
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公开(公告)号：EP0985983A2
公开(公告)日：2000-03-15
申请号：EP99307084.6
申请日：1999-09-07
发明人： Kohtani, Hideto , Muto, Tsuyoshi
IPC分类号： G03G21/02
CPC分类号： G07F7/02 , G03G21/02 , G06Q20/343
摘要： A counting apparatus comprising an execution detection circuit for detecting the execution of a predetermined operation; plural memory circuits for commonly storing the information on the number of execution at each detection of the execution; a destruction detection circuit for detecting, at the storage of the information, whether the information stored in each memory circuit is destructed; and a correction circuit adapted, upon detection that the information of a memory circuit is destructed, to correct the destructed information with the information of another memory circuit.
摘要翻译： 一种计数装置，包括用于检测预定操作的执行的执行检测电路; 多个存储电路，用于在每次执行检测时共同存储关于执行次数的信息; 破坏检测电路，用于在存储信息时检测存储在每个存储器电路中的信息是否被破坏; 以及校正电路，当检测到存储器电路的信息被破坏时，适配用另一个存储器电路的信息来校正被破坏的信息。
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