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公开(公告)号：EP3958499A1
公开(公告)日：2022-02-23
申请号：EP21191829.7
申请日：2021-08-18
申请人： INTEL Corporation
IPC分类号： H04L9/06
摘要： An apparatus is described including cryptography circuitry to generate authentication tags to provide integrity protection for plaintext and ciphertext.
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2.发明公开
公开(公告)号：EP3520315A1
公开(公告)日：2019-08-07
申请号：EP17857065.1
申请日：2017-08-25
申请人： Intel Corporation
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公开(公告)号：EP4152685A1
公开(公告)日：2023-03-22
申请号：EP22188583.3
申请日：2022-08-03
申请人： INTEL Corporation
摘要： An apparatus comprises an input register comprising an input polynomial, a processing datapath communicatively coupled to the input register comprising a plurality of compute nodes to perform an incomplete number theoretic transform (NTT) algorithm on the input polynomial to generate an output polynomial in NTT format, the plurality of compute nodes comprising at least a first NTT circuit comprising a single butterfly circuit to perform a series of butterfly calculations on input data; and a randomizing circuitry to randomize an order of the series of butterfly calculations.
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公开(公告)号：EP4152681A1
公开(公告)日：2023-03-22
申请号：EP22188584.1
申请日：2022-08-03
申请人： INTEL Corporation
摘要： An apparatus comprises an input register comprising an input polynomial, a processing datapath communicatively coupled to the input register comprising a plurality of compute nodes to perform a number theoretic transform (NTT) algorithm on the input polynomial to generate an output polynomial in NTT format. The plurality of compute nodes comprises at least a first butterfly circuit to perform a series of butterfly calculations on input data and a randomizing circuitry to randomize an order of the series of butterfly calculations.
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