Method and circuit arrangement for compensating for delayed components in transmission signal
    1.
    发明公开
    Method and circuit arrangement for compensating for delayed components in transmission signal 失效
    方法和电路装置用于补偿传输中的信号延迟分量

    公开(公告)号:EP0740443A2

    公开(公告)日:1996-10-30

    申请号:EP96105408.7

    申请日:1996-04-04

    发明人: Henriksson, Jukka

    IPC分类号: H04L25/03

    CPC分类号: H04L25/03057

    摘要: The invention is related to a method and circuit arrangement for compensating for delayed components of a received transmission signal especially in a digital transmission system based on physical lines. The method and arrangement utilize a decision feedback equalizer, wherein the weighted sum of decisions based on earlier samples is subtracted from a sample. According to the invention, delayed components in the signal are measured in a measuring unit (11). The earlier decisions to be subtracted from a signal sample are selected from a predetermined group of consecutive decisions, and the strength of the delay component in the delay between each decision and the signal sample is used as a selection criterion. Advantageously, the equalizer according to the invention includes a selector (8) which connects some of the taps of the delay line (7) to multiplier units (9). By means of this method and arrangement it is possible to implement with a small number of multiplier units a equalizer capable of compensating for delayed components with long delays.

    摘要翻译: 本发明涉及一种方法和电路装置用于补偿发送信号的延迟部件基于物理线路接收爱尤其是在一个数字传输系统。 该方法和装置利用一个判决反馈均衡器,worin的基于较早的样本决定的加权和从样品中减去。 。根据本发明,在信号延迟部件被测量的测量单元(11)。 从一个信号样本减去此前决定从一组规定的连续决定的选择,并且在每一个决策和信号采样之间的延迟的延迟分量的强度用作选择标准。 有利的是,均衡器gemäß到本发明包括一个选择器(8),其连接一些延迟线(7)的抽头到乘法器单元(9)。 通过该方法和装置的方式,可以用小数目的乘法器单元能够补偿具有长延迟而延迟部件的均衡器来实现。

    Method and circuit arrangement for processing variable symbol rates
    3.
    发明公开
    Method and circuit arrangement for processing variable symbol rates 失效
    方法和电路装置用于处理可变符号率

    公开(公告)号:EP0741472A3

    公开(公告)日:2000-06-07

    申请号:EP96106338.5

    申请日:1996-04-23

    IPC分类号: H04L7/02 H03H17/06

    摘要: The invention is related to a method and circuit arrangement for processing a received signal in a variable symbol rate system, such as a digital television system. In the method and arrangement according to the system, a received signal is sampled at a fixed sampling frequency (f f ) that is higher than the symbol frequency of any one of the received signals. The resulting sample sequence is converted to another sample sequence the sampling frequency of which equals the symbol frequency (f i ) of the received signal or its integer multiple. Then the samples are filtered (8) and signal value decisions are made (9) for the filtered samples. Conversion of the sampling frequency is advantageously performed using a so-called modified Farrow-type fractional delay filter (6) which is controlled using a control signal proportional to the delay of each sample. Using the method and arrangement according to the invention it is possible to process received signals the symbol frequencies of which are arbitrary within set limits.

    Method and circuit arrangement for compensating for delayed components in transmission signal
    4.
    发明公开
    Method and circuit arrangement for compensating for delayed components in transmission signal 失效
    方法和电路装置用于补偿传输中的信号延迟分量

    公开(公告)号:EP0740443A3

    公开(公告)日:2000-05-31

    申请号:EP96105408.7

    申请日:1996-04-04

    发明人: Henriksson, Jukka

    IPC分类号: H04L25/03

    CPC分类号: H04L25/03057

    摘要: The invention is related to a method and circuit arrangement for compensating for delayed components of a received transmission signal especially in a digital transmission system based on physical lines. The method and arrangement utilize a decision feedback equalizer, wherein the weighted sum of decisions based on earlier samples is subtracted from a sample. According to the invention, delayed components in the signal are measured in a measuring unit (11). The earlier decisions to be subtracted from a signal sample are selected from a predetermined group of consecutive decisions, and the strength of the delay component in the delay between each decision and the signal sample is used as a selection criterion. Advantageously, the equalizer according to the invention includes a selector (8) which connects some of the taps of the delay line (7) to multiplier units (9). By means of this method and arrangement it is possible to implement with a small number of multiplier units a equalizer capable of compensating for delayed components with long delays.

    Method and circuit arrangement for processing variable symbol rates
    5.
    发明公开
    Method and circuit arrangement for processing variable symbol rates 失效
    Verfahren und Schaltungsanordnung zur VerarbeitungveränderlicherSymbolraten

    公开(公告)号:EP0741472A2

    公开(公告)日:1996-11-06

    申请号:EP96106338.5

    申请日:1996-04-23

    IPC分类号: H04L7/02 H03H17/06

    摘要: The invention is related to a method and circuit arrangement for processing a received signal in a variable symbol rate system, such as a digital television system. In the method and arrangement according to the system, a received signal is sampled at a fixed sampling frequency (f f ) that is higher than the symbol frequency of any one of the received signals. The resulting sample sequence is converted to another sample sequence the sampling frequency of which equals the symbol frequency (f i ) of the received signal or its integer multiple. Then the samples are filtered (8) and signal value decisions are made (9) for the filtered samples. Conversion of the sampling frequency is advantageously performed using a so-called modified Farrow-type fractional delay filter (6) which is controlled using a control signal proportional to the delay of each sample. Using the method and arrangement according to the invention it is possible to process received signals the symbol frequencies of which are arbitrary within set limits.

    摘要翻译: 本发明涉及用于处理诸如数字电视系统的可变符号率系统中的接收信号的方法和电路装置。 在根据该系统的方法和装置中,以比接收信号中的任何一个的符号频率高的固定采样频率(ff)对接收信号进行采样。 所得到的采样序列被转换为其采样频率等于接收信号的符号频率(fi)或其整数倍的另一采样序列。 然后对样本进行滤波(8),并对滤波后的样本进行信号值决定(9)。 使用所谓的修改的Farrow型分数延迟滤波器(6)有利地进行采样频率的转换,其使用与每个样本的延迟成比例的控制信号来控制。 使用根据本发明的方法和装置,可以处理其设定限制内的符号频率是任意的接收信号。