摘要:
A data receiver is described, in which a received signal is converted to digital form (1) and subsequently detected by means of a Viterbi processor (3). In order that the analog-digital convertor (1) sample the incoming signal at the correct time, the sampling time is derived from an error signal, which is a metric for the difference between the expected symbol, and the symbol actually received. This is produced by a multiplier (4), a low-pass filter (5) and a controllable oscillator (6). In order to use information from precursors, an error signal, e(k-1), is used, which corresponds to a later time than does the tentative decision, â(k-2), of the present data symbol.
摘要:
A data receiver is described, in which a received signal is converted to digital form (1) and subsequently detected by means of a Viterbi processor (3). In order that the analog-digital convertor (1) sample the incoming signal at the correct time, the sampling time is derived from an error signal, which is a metric for the difference between the expected symbol, and the symbol actually received. This is produced by a multiplier (4), a low-pass filter (5) and a controllable oscillator (6). In order to use information from precursors, an error signal, e(k-1), is used, which corresponds to a later time than does the tentative decision, â(k-2), of the present data symbol.