摘要:
An overvoltage protection device includes first and second electrically conductive electrode members (130, 120) and a varistor member (110) formed of a varistor material (172) and electrically connected with each of the first and second electrode members. The overvoltage protection device has an integral fail-safe mechanism operative to electrically short circuit the first and second electrode members about the varistor member by fusing the meltable member (140) in the overvoltage protection device (134) by using an electric arc. The overvoltage protection device further includes an electrically insulating spacer member (144) electrically isolating the fusing metal member (140) from the electrodes; the electric arc disintegrates the spacer member and extends across the gap (G1, G3 and G2) to fuse the meltable/fusing member (140).
摘要:
Devices include an impulse current generator that is configured to provide a direct impulse current (DIC) that includes a specified waveform to a test load during a test duration, a continuous power supply that is configured to provide a continuous power to the test load during the test duration, a trigger circuit that is configured to determine a trigger condition that corresponds to the DIC and to generate a trigger signal responsive to determining the trigger condition, and a current bypass circuit that is configured to receive the trigger signal generated by the trigger circuit and to conduct a majority portion of the DIC being conducted by the load responsive to the trigger signal.
摘要:
Devices include an impulse current generator that is configured to provide a direct impulse current (DIC) that includes a specified waveform to a test load during a test duration, a continuous power supply that is configured to provide a continuous power to the test load during the test duration, a trigger circuit that is configured to determine a trigger condition that corresponds to the DIC and to generate a trigger signal responsive to determining the trigger condition, and a current bypass circuit that is configured to receive the trigger signal generated by the trigger circuit and to conduct a majority portion of the DIC being conducted by the load responsive to the trigger signal.