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公开(公告)号:EP0694391B1
公开(公告)日:2001-01-03
申请号:EP95305178.6
申请日:1995-07-25
发明人: Imanaka, Yoshiyuki, c/o Canon K.K. , Furukawa, Tatsuo, c/o Canon K.K. , Maru, Hiroyuki, c/o Canon K.K.
IPC分类号: B41J2/05
CPC分类号: B41J2/04541 , B41J2/0458
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公开(公告)号:EP0710986A2
公开(公告)日:1996-05-08
申请号:EP96200019.6
申请日:1991-02-28
IPC分类号: H01L27/146
CPC分类号: H01L27/14643 , H01L27/14681
摘要: A photoelectric converter comprises:
a photoreceiving element capable of storing photoelectrically produced charge; a detecting circuit for detecting at least either a signal of storage in a photoelectric conversion element, on which light of the highest intensity is incident, or a signal of storage in a photoelectric conversion element, on which light of the lowest intensity is incident; a reading circuit for reading a signal based on photoelectrically produced signal charge out of the photoreceiving element; and a signal processing circuit for processing signal read out from the reading circuit. The element and circuits are provided on a common substrate. The detecting circuit is provided between the photoreceiving element and reading circuit.摘要翻译: 光电转换器包括:能够存储光电产生电荷的光接收元件; 检测电路,用于检测光强度最高的光入射的光电转换元件中的存储信号,或存储于光电转换元件中的最低强度的光入射的信号; 读取电路,用于基于光电产生的信号电荷从光接收元件读出信号; 以及用于处理从读取电路读出的信号的信号处理电路。 元件和电路设置在公共基板上。 检测电路设置在光接收元件和读取电路之间。
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公开(公告)号:EP0694391A2
公开(公告)日:1996-01-31
申请号:EP95305178.6
申请日:1995-07-25
发明人: Imanaka, Yoshiyuki, c/o Canon K.K. , Furukawa, Tatsuo, c/o Canon K.K. , Maru, Hiroyuki, c/o Canon K.K.
IPC分类号: B41J2/05
CPC分类号: B41J2/04541 , B41J2/0458
摘要: Heating elements and logic circuits are provided on the base board of a printing head, and noise inhibiting circuit having a hysteresis characteristic are provided between the logic circuits and the input terminals of the base board. The base board, heating elements, logic circuits and noise inhibiting circuits are fabricated by a semiconductor manufacturing process. Each noise inhibiting circuit applies an input signal that enters from an input pad to first and second gates constituted by two MOSFETs having threshold potentials that differ from each other. A flip-flop circuit set or rest by the outputs of the first and second gates is provided on the output side. The noise inhibiting circuit having the hysteresis characteristic is constructed between the threshold potential of the first gate and the threshold potential of the second gate.
摘要翻译: 加热元件和逻辑电路设置在打印头的基板上,并且在逻辑电路和基板的输入端子之间设置具有滞后特性的噪声抑制电路。 基板,加热元件,逻辑电路和噪声抑制电路由半导体制造工艺制造。 每个噪声抑制电路将从输入焊盘进入的输入信号施加到由具有彼此不同的阈值电势的两个MOSFET构成的第一和第二栅极。 在输出侧提供由第一和第二门的输出设置或休息的触发器电路。 具有滞后特性的噪声抑制电路被构造在第一栅极的阈值电势和第二栅极的阈值电势之间。
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