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34 条记录 (耗时 0.021 秒)

    A digital automatic gain control circuit
    12.
    发明公开
    A digital automatic gain control circuit 失效
    数字自动增益控制电路。

    公开(公告)号：EP0069515A2

    公开(公告)日：1983-01-12

    申请号：EP82303328.7

    申请日：1982-06-25

    申请人： FUJITSU LIMITED

    发明人： Unagami, Shigeyuki ,  Ihira, Kuninosuke ,  Kaku, Takashi

    IPC分类号： H03G3/20

    CPC分类号： H03G3/3089

    摘要： A digital automatic gain control circuit (10) is provided with both a first AGC loop (11) and a second AGC loop (12) activated alternatively. The first AGC loop (11) is activated when an input signal (A in ) is initially supplied. The loop (11) produces a certain digital value, calculated as an inverse number of the digital level (x) of the input (Ain) through predetermined digital arithmetic operations utilizing an approximation polynominal. The calculated digital value is then preset in certain portions of the second AGC loop (12). The second AGC loop (12) starts operating by using said preset value, then uses the digital level (x) of the input itself, instead of the preset value, and produces automatic gain controlled digital output.

    Scrambling in a full-duplex modem
    14.
    发明公开
    Scrambling in a full-duplex modem 失效
    在einem Vollduplexmodem中的加扰器

    公开(公告)号：EP0874493A2

    公开(公告)日：1998-10-28

    申请号：EP98201947.3

    申请日：1993-07-09

    申请人： FUJITSU LIMITED

    发明人： Kaku, Takashi ,  Obikawa, Toyomi

    IPC分类号： H04L1/22 ,  H04L5/14 ,  H04L27/38 ,  H04L25/03

    CPC分类号： H04L25/0262 ,  H04B3/23 ,  H04L1/22 ,  H04L5/143 ,  H04L25/068

    摘要： In a modem, after scrambling data which are time-divided into main data and secondary data, a 2W-4W conversion circuit 14 sends the data to the two-wire line. An estimated echo component is subtracted from a signal which is available from the 2W-4W conversion circuit 14. Following this, the signal from the 2W-4W conversion circuit 14 is demodulated, descrambled and separated into main data and secondary data. A generator polynomial for scrambling is different from a generator polynomial for descrambling. The modem comprises a line-trouble-detect part 6 which samples data of the secondary channel, by multipoint sampling, to obtain the secondary data and detects the number of inversion points in the descrambled secondary channel data per unit time period. The line-trouble-detect part 6 outputs a line-trouble signal which indicates that there is a trouble on the line if the number of detected inversion points is more than a predetermined number.

    摘要翻译： 在调制解调器中，在将分组成主数据和次数据的数据进行加扰之后，2W-4W转换电路14将数据发送到双线线路。 从可从2W-4W转换电路14获得的信号中减去估计回波分量。接着，来自2W-4W转换电路14的信号被解调，解扰并分离成主数据和次数据。 用于加扰的生成多项式与用于解扰的生成多项式不同。 调制解调器包括线路故障检测部分6，其通过多点采样来对二次信道的数据进行采样，以获得辅助数据，并且检测每单位时间段内解扰的次级信道数据中的反转点的数量。 线路故障检测部6输出线路故障信号，如果检测到的反转点的数量大于预定数量，则线路故障信号指示线路有故障。

    Transversal type automatic equalizer with tap coefficient protection
    16.
    发明公开
    Transversal type automatic equalizer with tap coefficient protection 失效
    横向类型自动平衡仪与贴片系统保护

    公开(公告)号：EP0419225A3

    公开(公告)日：1992-03-18

    申请号：EP90310228.3

    申请日：1990-09-19

    申请人： FUJITSU LIMITED

    发明人： Kaku, Takashi ,  Kishimoto, Hiroki

    IPC分类号： H04L25/03

    CPC分类号： H04L25/03044

    摘要： A system of the transversal type automatic equalizer with a tap coefficient protection in which inter-symbol interference is prevented includes a summing unit (51) for summing all of the tap powers detected by a tap power detecting unit (41, 42, ... 4n), and a determination unit (52) for comparing the sum produced by the summing unit (51) with a predetermined threshold value, and for producing the output determination of normal when the sum is not more than the threshold value and producing the output determination of alnormal tap coefficient growth when the sum is more than the threshold value.

    Method and device for timing pull-in of receiving equipment
    17.
    发明公开
    Method and device for timing pull-in of receiving equipment 失效
    方法和装置用于紧固的接收系统的同步。

    公开(公告)号：EP0205378A2

    公开(公告)日：1986-12-17

    申请号：EP86401173.9

    申请日：1986-06-03

    申请人： FUJITSU LIMITED

    发明人： Kaku, Takashi ,  Arai, Yasuhiro

    IPC分类号： H04L7/02

    CPC分类号： H04L7/0054 ,  H04L7/046

    摘要： Receiving equipment comprising a demodulator (3), a timing extraction unit (4), a PLL unit (7), an impulse recovery unit (12), a fix-equalizer (13), and an automatic-equalizer (14). A timing pull-in operation is performed by recovering the impulse from a training signal containing an impulse compo- - nent and received at the time of initial training of the receiving equipment, setting a complex conjugate of the recovered impulse as the tap coefficient (CJ) for the fix-equalizer (13), calculating the ta coefficient for the automatic-equalizer (14) from the recovered impulse to set it initially to the automatic-equalizer (14), and setting the amount of phase rotation to phase rotating means (6) so thatthe phase of the timing signal from the timing extraction unit (4) coincides with the phase of an internal clock.

    摘要翻译： 接收设备包括解调器（3），定时提取单元（4），一个PLL单元（7）冲​​动回收单元（12），固定均衡器（13），以及自动均衡器（14）。 定时拉入手术执行通过回收来自在脉冲分量包含在锻炼信号的脉冲，并在该接收设备的初始训练的时间接收到的，设置回收脉冲作为抽头系数（CJ）的复共轭 固定均衡器（13），计算用于从回收的冲动的自动均衡器（14）的TA系数初始设置它的自动均衡器（14），以及设置相位旋转的量相位旋转装置（6） 所以没有来自定时提取单元（4）的定时信号的相位与内部时钟的相位一致。

    Digital phase locked loop pull-in circuitry
    18.
    发明公开
    Digital phase locked loop pull-in circuitry 失效
    Fangschaltungfürdigitale，phasenverriegelte Schleife。

    公开(公告)号：EP0053939A1

    公开(公告)日：1982-06-16

    申请号：EP81305777.5

    申请日：1981-12-08

    申请人： FUJITSU LIMITED

    发明人： Ihira, Kuninosuke ,  Unagami, Shigeyuki ,  Kaku, Takashi

    IPC分类号： H03L7/00 ,  H04L27/22 ,  H04L7/02

    CPC分类号： H04L7/027 ,  H03L7/0993 ,  H04L7/02 ,  H04L27/2272

    摘要： Circuitry is provided for assessing phase difference between first (f R ) and second (CL) signals.
    The first signal (f R ) is sampled at first and second timings to obtain first and second samples (y o , y,). The first and second timings are determined by the second signal (CL) so as to be spaced apart in phase, with respect to the first signal (f R ) by π/2.
    On the basis of the signs, absolute values and amplitude ratio of the two sample values (y o . y 1 ) phase difference between the first and second signals can be assessed employing a conversion table which can deal with only phase angles in the range from 0 to π/4 radians.

    摘要翻译： 提供电路用于评估第一（fR）和第二（CL）信号之间的相位差。 在第一和第二定时对第一信号（fR）进行采样，以获得第一和第二采样（y0，y1）。 第一和第二定时由第二信号（CL）确定，以便相对于第一信号（fR）以π/ 2相位隔开。 基于符号，可以使用可以仅处理相位角的转换表来评估第一和第二信号之间的两个采样值（y0，y1）相位差的绝对值和幅度比 范围从0到pi 4弧度。

    Multiplex transmission and reception system
    19.
    发明公开
    Multiplex transmission and reception system 失效
    多路传输和接收系统

    公开(公告)号：EP0800297A1

    公开(公告)日：1997-10-08

    申请号：EP97302319.5

    申请日：1997-04-04

    申请人： FUJITSU LIMITED

    发明人： Kaku, Takashi ,  Okita, Ryoji

    IPC分类号： H04L27/34 ,  H04L5/00

    CPC分类号： H04L27/3483 ,  H04L5/00

    摘要： A modem signal transmitting/receiving system including a modem signal transmitter (1) and a modem signal receiver (8) connected to each other via a transmission line (17). The modem signal transmitter (1) is operable to transmit by multiplexing an analog signal, such as an audio signal, together with a modem carrier with digital data. The modem signal transmitter (1) includes an analog-to-digital converting unit (2) which converts an analog signal into a digital signal, a demodulating unit (3) which demodulates the digital signal with a predetermined carrier frequency signal, a decimation processing filter (4) which decimates the demodulated signal and a deciding unit (5) which decides a coordinate on a two-dimensional plane for the output from the decimation processing filter (4) and then inputs the decision result to a modem transmitting unit (6). The signal received from the transmission line (7) is subjected to an interpolation process (10), modulated by a modulating unit (11) with a predetermined carrier frequency, converted to an analog signal by a digital-to-analog converting unit (12) and outputted to the analog signal line.

    摘要翻译： 一种调制解调信号发射/接收系统，包括经传输线（17）相互连接的调制解调信号发射机（1）和调制解调信号接收机（8）。 调制解调器信号发射器（1）可操作以通过将诸如音频信号的模拟信号与具有数字数据的调制解调器载波一起多路复用来发送。 调制解调器信号发送器（1）包括将模拟信号转换成数字信号的模数转换单元（2），用预定载频信号解调数字信号的解调单元（3），抽选处理 对抽取处理滤波器（4）的输出进行抽取的抽取滤波器（4）和决定二维平面上坐标的决定单元（5），然后将决定结果输入到调制解调器发送单元（6 ）。 从传输线（7）接收到的信号经过插值过程（10），由调制单元（11）以预定载波频率调制，由数模转换单元（12）转换为模拟信号 ）并输出到模拟信号线。