A SIGNAL INTERFACE FOR HIGHER DATA RATES
    11.
    发明公开
    A SIGNAL INTERFACE FOR HIGHER DATA RATES 审中-公开
    信息技术FÜRHÖHEREDATENRATEN

    公开(公告)号:EP1661351A2

    公开(公告)日:2006-05-31

    申请号:EP04781016.3

    申请日:2004-08-12

    IPC分类号: H04L29/00

    摘要: A method for providing multimedia synchronization for simultaneous isochronous data streams through a frame sync packet in a MDDI communication system, the method comprising the steps of sending a frame sync packet from a host to a client; grouping blocks of the data streams having a pre-determined size within a frame structure; aligning a multimedia content upon receipt of the frame sync packet by the client; and presenting the multimedia content as well as a corresponding apparatus.

    摘要翻译: 一种用于通过MDDI通信系统中的帧同步分组提供用于同步同步数据流的多媒体同步的方法,所述方法包括以下步骤:从主机向客户端发送帧同步分组; 在帧结构内具有预定尺寸的数据流的分组块; 在客户接收到帧同步数据包时对齐多媒体内容; 并呈现多媒体内容以及对应的装置。

    HIGH DATA RATE INTERFACE
    13.
    发明授权
    HIGH DATA RATE INTERFACE 有权
    霍恩霍恩德

    公开(公告)号:EP1665730B1

    公开(公告)日:2009-03-04

    申请号:EP04788672.6

    申请日:2004-09-10

    IPC分类号: H04L29/06 H04L12/28 H04L12/56

    摘要: A data Interface for transferring digital data between a host and a client over a communication path using packet structures linked together to form a communication protocol for communicating a pre-selected set of digital control and presentation data. The signal protocol is used by link controllers configured to generate, transmit, and receive packets forming the communications protocol, and to form digital data into one or more types of data packets, with at least one residing in the host device and being coupled to the client through the communications path. The interface provides a cost-effective, low power, bi-directional, high-speed data transfer mechanism over a short-range "serial" type data link, which lends itself to implementation with miniature connectors and thin flexible cables which are especially useful in connecting display elements such as wearable micro-displays to portable computers and wireless communication devices.

    摘要翻译: 一种用于通过链路连接在一起的分组结构通过通信路径在主机和客户机之间传送数字数据的数据接口,以形成用于传送预先选择的一组数字控制和呈现数据的通信协议。 信号协议被配置为生成,发送和接收形成通信协议的分组的链路控制器使用,并且将数字数据形成为一个或多个类型的数据分组,其中至少一个驻留在主机设备中并耦合到 客户端通过通信路径。 该接口通过短距离“串行”类型的数据链路提供了一种经济高效,低功耗,双向,高速的数据传输机制,可实现微型连接器和薄型柔性电缆,特别适用于 将可穿戴式微型显示器等显示元件连接到便携式计算机和无线通信设备。

    HIGH DATA RATE INTERFACE
    16.
    发明公开
    HIGH DATA RATE INTERFACE 审中-公开
    霍恩霍恩德

    公开(公告)号:EP1692842A1

    公开(公告)日:2006-08-23

    申请号:EP04810167.9

    申请日:2004-10-29

    IPC分类号: H04L29/06 H04L12/28 H04L12/56

    摘要: A data Interface for transferring digital data between a host and a client over a communication path using packet structures linked together to form a communication protocol for communicating a pre-selected set of digital control and presentation data. The signal protocol is used by link controllers configured to generate, transmit, and receive packets forming the communications protocol, and to form digital data into one or more types of data packets, with at least one residing in the host device and being coupled to the client through the communications path. The interface provides a cost-effective, low power, bi-directional, high-speed data transfer mechanism over a short-range “serial” type data link, which lends itself to implementation with miniature connectors and thin flexible cables which are especially useful in connecting display elements such as wearable micro-displays to portable computers and wireless communication devices.

    摘要翻译: 一种用于通过链路连接在一起的分组结构通过通信路径在主机和客户机之间传送数字数据的数据接口,以形成用于传送预先选择的一组数字控制和呈现数据的通信协议。 信号协议被配置为生成,发送和接收形成通信协议的分组的链路控制器使用,并且将数字数据形成为一个或多个类型的数据分组,其中至少一个驻留在主机设备中并耦合到 客户端通过通信路径。 该接口通过短距离“串行”类型的数据链路提供了一种经济高效,低功耗,双向,高速的数据传输机制,可实现微型连接器和薄型柔性电缆,特别适用于 将可穿戴式微型显示器等显示元件连接到便携式计算机和无线通信设备。

    HIGH DATA RATE INTERFACE
    17.
    发明公开
    HIGH DATA RATE INTERFACE 有权
    高数据速率接口

    公开(公告)号:EP1665730A1

    公开(公告)日:2006-06-07

    申请号:EP04788672.6

    申请日:2004-09-10

    IPC分类号: H04L29/06 H04L12/28 H04L12/56

    摘要: A data Interface for transferring digital data between a host and a client over a communication path using packet structures linked together to form a communication protocol for communicating a pre-selected set of digital control and presentation data. The signal protocol is used by link controllers configured to generate, transmit, and receive packets forming the communications protocol, and to form digital data into one or more types of data packets, with at least one residing in the host device and being coupled to the client through the communications path. The interface provides a cost-effective, low power, bi-directional, high-speed data transfer mechanism over a short-range "serial" type data link, which lends itself to implementation with miniature connectors and thin flexible cables which are especially useful in connecting display elements such as wearable micro-displays to portable computers and wireless communication devices.

    摘要翻译: 一种数据接口,用于通过使用分组结构链接在一起的通信路径在主机和客户机之间传送数字数据,以形成用于传送预先选择的一组数字控制和演示数据的通信协议。 信号协议由链路控制器使用,所述链路控制器被配置为生成,发送和接收形成通信协议的分组,并且将数字数据形成为一种或多种类型的数据分组,其中至少一个驻留在主机设备中并且耦合到 客户端通过通信路径。 该接口通过短程“串行”型数据链路提供了经济高效,低功耗,双向,高速的数据传输机制,适用于微型连接器和薄型柔性电缆,这些特别适用于 将诸如可穿戴微型显示器的显示元件连接到便携式计算机和无线通信设备。

    CONTROLLING FORWARD LINK TRAFFIC CHANNEL POWER
    18.
    发明公开
    CONTROLLING FORWARD LINK TRAFFIC CHANNEL POWER 审中-公开
    业务信道的前向链路功率控制

    公开(公告)号:EP1442539A1

    公开(公告)日:2004-08-04

    申请号:EP02786530.2

    申请日:2002-10-25

    IPC分类号: H04B7/185 H04B7/005

    摘要: Forward link transmission power to a user terminal (124a, 124b, 124c) in a wireless communications system (100) having a plurality of beams (204) is controlled by determining a baseline power level, Pbaseline, from a received active pilot channel signal-to-noise ratio (SNR) (402); determining a power margin, Pmargin, from an identified interference susceptibility (404); determining a power level correction, Pcorrection, based on an identified packet error rate (PER) (406); and setting Ptransmit based on Pbaseline, Pmargin, and Pcorrection (420). For example, Ptransmit may be set to a power level that is substantially equal to the sum of Pbaseline, Pmargin, and Pcorrection. The determination of each of Pbaseline, Pmargin, and Pcorrection may be performed in independently running control loops or processes.