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公开(公告)号：EP0430707A3
公开(公告)日：1992-04-22
申请号：EP90313045.8
申请日：1990-11-30
CPC分类号： G01R19/30
摘要： An extreme level circuit for detecting an extreme level of two input signals. The circuit includes a differential circuit wherein a pair of differential transistors (T22, T23) are connected their emitters with each other and a common current source (IE11) is connected to the emitter junction node of the differential transistors (T22, T23), a pair of emitter follower transistors (T26, T27) coupled to the differential circuit for applying the input signals to the bases of the differential transistors (T26, T27) and a pair of bias generating circuits each coupled in series with one of the emitter follower circuits (T26, T27), wherein each bias generating circuit has a bias transistor (T24/T25) whose base being connected to a fixed bias source (VB2) and a current source (IE12/IE13) connected in series with the bias transistor (T24/T25), and wherein the pair of bias generating circuits are cross connected to the collectors of the differential transistors (T22, T23).
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公开(公告)号：EP0430707A2
公开(公告)日：1991-06-05
申请号：EP90313045.8
申请日：1990-11-30
CPC分类号： G01R19/30
摘要： An extreme level circuit for detecting an extreme level of two input signals. The circuit includes a differential circuit wherein a pair of differential transistors (T22, T23) are connected their emitters with each other and a common current source (IE11) is connected to the emitter junction node of the differential transistors (T22, T23), a pair of emitter follower transistors (T26, T27) coupled to the differential circuit for applying the input signals to the bases of the differential transistors (T26, T27) and a pair of bias generating circuits each coupled in series with one of the emitter follower circuits (T26, T27), wherein each bias generating circuit has a bias transistor (T24/T25) whose base being connected to a fixed bias source (VB2) and a current source (IE12/IE13) connected in series with the bias transistor (T24/T25), and wherein the pair of bias generating circuits are cross connected to the collectors of the differential transistors (T22, T23).
摘要翻译： 用于检测两个输入信号的极端电平的极端电平电路。 电路包括差分电路，其中一对差分晶体管（T22，T23）彼此的发射极相连，公共电流源（IE11）连接到差分晶体管（T22，T23）的发射极结节点， 耦合到差分电路的一对射极跟随器晶体管（T26，T27），用于将输入信号施加到差分晶体管（T26，T27）的基极，以及一对偏置产生电路，每个偏置产生电路与射极跟随器电路 （T26，T27），其中每个偏置产生电路具有一个偏置晶体管（T24 / T25），其基极连接到固定偏压源（VB2）和与偏置晶体管（T24）串联连接的电流源（IE12 / IE13） / T25），并且其中该对偏置发生电路与差分晶体管（T22，T23）的集电极交叉连接。
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13.发明公开
公开(公告)号：EP0410533A1
公开(公告)日：1991-01-30
申请号：EP90202009.8
申请日：1990-07-23
申请人： THOMSON-TRT DEFENSE
发明人： Hethuin, Serge
摘要： Le procédé comporte une étape de coupage en zones (z₁,...z₈) de l'impulsion reçue. On effectue une moyenne des échantillons à l'intérieur de chaque zone pour obtenir les points PI(1)...PI(8). La droite DR qui passe au mieux au travers de ces points donne l'instant t MAX qui est la "date" de l'impulsion.
Application: radionavigation.
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