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34 条记录 (耗时 0.015 秒)

    Modulator-demodulator device capable of detecting an unsynchronized frame state
    31.
    发明公开
    Modulator-demodulator device capable of detecting an unsynchronized frame state 失效
    调制解调器解调器，数字同步器，Rahmenzuständezu Erkennen

    公开(公告)号：EP0721265A2

    公开(公告)日：1996-07-10

    申请号：EP96104775.0

    申请日：1990-06-13

    申请人： FUJITSU LIMITED

    发明人： Mizutani, Yasunao ,  Kaku, Takashi

    IPC分类号： H04L7/04 ,  H04L27/38

    CPC分类号： H04L27/38 ,  H04L7/048

    摘要： A modulator-demodulator device capable of detecting an unsynchronized frame state, comprising in the transmitter side: error control coding means (110) for coding the signal to be transmitted in accordance with a predetermined transition rule for restricting the transition of signal points on the complex plane; modulation means (140) for modulating the coded signal coded by said error control coding means to transmit the modulated signal to the communication network; first transmission signal selecting means (160) for transmitting a non-coded signal not coded by said error control coding means during a predetermined time period upon the start of transmission of the non-coded signal by said error control coding means; second transmission signal selecting means (160) for transmitting a predetermined coded signal coded by said error control coding means during a predetermined time period upon the completion of the transmission of the non-coded signal, and switching to the transmission of the transmission data upon the completion of the transmission of the coded signal;
       and said device comprising in the receiver side: demodulation means (200) for demodulating the signal point on the complex plane from the signal received from said communication network (6); error control signal decoding means (220) for setting an evaluation value for each of the transition sequences of a plurality of the received signals based on the transition rule of the transmitter side, updating the evaluation value for each of the received signals, and selecting the transition sequence of the maximum likelihood received signal based on the updated evaluation value to correct the error in the demodulated signal point; and evaluation value setting means (240) for designating to said error control signal decoding means the initial value of the evaluation value updated by the coding signal which is first received upon the switching from the transmission of the non-coded signal to the transmission of the coded signal.

    摘要翻译： 一种能够检测不同步帧状态的调制器 - 解调器装置，包括在发射机侧：用于根据用于限制复合体上的信号点的转变的预定转换规则对要发送的信号进行编码的差错控制编码装置（110） 平面; 调制装置（140），用于调制由所述差错控制编码装置编码的编码信号，以将调制信号发送到通信网络; 第一发送信号选择装置，用于在由所述错误控制编码装置开始发送所述非编码信号时，在预定时间段期间发送由所述差错控制编码装置未被编码的非编码信号; 第二发送信号选择装置（160），用于在完成非编码信号的发送时在预定时间段期间发送由所述差错控制编码装置编码的预定编码信号，以及切换到发送数据 完成编码信号的传输; 并且所述设备包括在接收机侧：解调装置（200），用于从从所述通信网络（6）接收的信号中解调复平面上的信号点; 误差控制信号解码装置（220），用于根据发射机侧的转换规则设置多个接收信号的每个转换序列的评估值，更新每个接收信号的评估值，并选择 基于更新的评估值的最大似然接收信号的转换序列来校正解调信号点中的误差; 以及评估值设定装置（240），用于向所述错误控制信号解码装置指定由从非编码信号的传送切换到第一传送时首先接收到的编码信号更新的评估值的初始值 编码信号。

    Method and device for timing pull-in of receiving equipment
    34.
    发明公开
    Method and device for timing pull-in of receiving equipment 失效
    用于定时接收设备的方法和设备

    公开(公告)号：EP0205378A3

    公开(公告)日：1989-01-11

    申请号：EP86401173.9

    申请日：1986-06-03

    申请人： FUJITSU LIMITED

    发明人： Kaku, Takashi ,  Arai, Yasuhiro

    IPC分类号： H04L7/02

    CPC分类号： H04L7/0054 ,  H04L7/046

    摘要： Receiving equipment comprising a demodulator (3), a timing extraction unit (4), a PLL unit (7), an impulse recovery unit (12), a fix-equalizer (13), and an automatic-equalizer (14). A timing pull-in operation is performed by recovering the impulse from a training signal containing an impulse compo- - nent and received at the time of initial training of the receiving equipment, setting a complex conjugate of the recovered impulse as the tap coefficient (CJ) for the fix-equalizer (13), calculating the ta coefficient for the automatic-equalizer (14) from the recovered impulse to set it initially to the automatic-equalizer (14), and setting the amount of phase rotation to phase rotating means (6) so thatthe phase of the timing signal from the timing extraction unit (4) coincides with the phase of an internal clock.