公开(公告)号：EP0883303A1

公开(公告)日：1998-12-09

申请号：EP97947897.1

申请日：1997-12-11

申请人： SONY CORPORATION

发明人： HORISHI, Takashi, Sony Corporation ,  KONDO, Tetsujiro, Sony Corporation

IPC分类号： H04N11/20 ,  H04N7/01

CPC分类号： H04N7/0137 ,  H04N5/145 ,  H04N7/0122 ,  H04N7/0125 ,  H04N9/64

摘要： An SD pixel of a luminance signal is held by a delay register section (31), and the class of the SD pixel is discriminated by a classifying section (33). A coefficient corresponding to the result of discrimination is read out of a coefficient RAM section (40) and outputted to a product-sum section (38). Pixel data of 17 taps are taken from the delay register section (31), then converted to 7 taps, and thus outputted to the product-sum section (38). The product-sum section (38) carries out product-sum operation of the pixel data and the coefficient, and outputs the result of operation as an HD pixel. An interpolation pixel operating section (42) carries out simple interpolation of pixel data of a color-signal component which is different from interpolation in the case of a luminance signal, and generates an HD pixel of the color signal. Thus, miniaturization and reduction in cost are realized.

公开(公告)号：EP0843475A1

公开(公告)日：1998-05-20

申请号：EP97924276.5

申请日：1997-05-30

申请人： SONY CORPORATION

发明人： HORISHI, Takashi, Sony Corporation ,  UCHIDA, Masashi, Sony Corporation ,  KONDO, Tetsujiro, Sony Corporation

IPC分类号： H04N7/01

CPC分类号： H04N7/0135 ,  H04N7/01 ,  H04N7/0125 ,  H04N7/0145 ,  H04N19/117 ,  H04N19/136 ,  H04N19/172 ,  H04N19/587 ,  H04N19/59 ,  H04N19/61 ,  H04N19/98

摘要： An ADRC circuit 3 generates spatial classes with SD data extracted by an area extracting circuit 2. A moving class determining circuit 5 generates a moving class with SD data extracted by an area extracting circuit 4. A class code generating circuit 6 generates a class code with the spatial class and the moving class. A tap decreasing ROM 7 supplies additional code data for each class code to a tap decreasing code 10. The additional code data is used to decrease taps of SD data. The tap decreasing circuit 10 decreases the SD data extracted by an area extracting circuit 9. A prediction calculating circuit 11 receives coefficient data corresponding to the class code from a ROM table 8 and obtains HD data with the decreased SD data corresponding to a linear prediction equation.

摘要翻译： ADRC电路3产生具有由区域提取电路2提取的SD数据的空间等级。移动类确定电路5生成由区域提取电路4提取的具有SD数据的移动类。类代码生成电路6生成具有 空间类和移动类。 抽头减少ROM 7将每个类代码的附加代码数据提供给抽头减少代码10.附加代码数据用于减少SD数据的抽头。 抽头减少电路10减少由区域提取电路9提取的SD数据。预测计算电路11从ROM表8接收与类代码对应的系数数据，并且获得具有与线性预测方程对应的减少的SD数据的HD数据 。