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    Apparatus and method for decoding a sequence of pseudo-ternary digital signals
    31.
    发明公开
    Apparatus and method for decoding a sequence of pseudo-ternary digital signals 失效
    用于解码伪数字数字信号序列的装置和方法

    公开(公告)号：EP0209839A3

    公开(公告)日：1989-07-05

    申请号：EP86109713.7

    申请日：1986-07-15

    申请人： International Business Machines Corporation

    发明人： Eggenberger, John Scott ,  Turner, David Price

    IPC分类号： H03M13/12 ,  H03M13/00 ,  H03M5/18

    CPC分类号： H03M5/18 ,  H03M13/23

    摘要： The present invention relates to apparatus for decoding a sequence of pseudo-ternary digital signals (100), wherein each signal can have one of three possible values, a zero value, a positive value or a negative value. The apparatus is of the type which comprises storage means (116) for storing an estimator (E) representing each of the possible positive and negative values, sampling means (102) for sampling the sequence of signals (100) at predetermined time intervals and obtaining sample signals (S), and comparison means (94, 112) for comparing each sample signal (S) with the estimator (E) to determine whether each sample signal (S) is equivalent to any one of the possible values. Apparatus in accordance with the invention is characterised in that the comparison means comprises estimator changing means (114) for changing the current amplitude of the estimator (E) to the amplitude of a sample signal (S) when the amplitude of the sample signal appears to represent one of the possible positive or negative values more accurately than the current amplitude of the estimator. The invention also relates to a method of decoding a sequence of pseudo-ternary digital signals, wherein each signal can have one of three possible values, a zero value, a positive value or a negative value, utilising apparatus as defined above.

    摘要翻译： 本发明涉及用于解码伪三元数字信号序列（100）的装置，其中每个信号可以具有三个可能值中的一个，零值，正值或负值。 该装置是包括用于存储表示可能的正值和负值中的每一个的估计器（E）的存储装置（116），用于以预定的时间间隔对信号序列（100）进行采样的采样装置（102） 采样信号（S）和用于将每个采样信号（S）与估计器（E）进行比较的比较装置（94,112），以确定每个采样信号（S）是否等于任何一个可能的值。 根据本发明的装置的特征在于，比较装置包括估计器改变装置（114），用于当采样信号的振幅看起来变化时，将估计器（E）的当前幅度改变为采样信号（S）的振幅 比估计器的当前幅度更准确地表示可能的正值或负值之一。 本发明还涉及一种解码伪三元数字信号序列的方法，其中每个信号可以使用如上所述的装置的三个可能值中的一个，零值，正值或负值。

    Data transmission system
    32.
    发明公开
    Data transmission system 失效

    公开(公告)号：EP0230714A2

    公开(公告)日：1987-08-05

    申请号：EP86307751.7

    申请日：1986-10-08

    申请人： NORTHERN TELECOM LIMITED

    发明人： Fisher, David Anthony

    IPC分类号： H03M5/18

    CPC分类号： H04L25/4908

    摘要： The system uses a 3B2T line code, i.e. one in which sets of three or triplets of binary digits are converted into pairs or duplets of ternary elements. All nine of the possible ternary duplets are used, in such a way that the same ternary duplet does not occur twice consecutively. This is done in one version by using the ninth duplet 00 as a repeat indicator, and in the other version by a conversion process in which each conversion operation takes into account the result of the preceding operation.

    Apparatus and method for decoding a sequence of pseudo-ternary digital signals
    33.
    发明公开
    Apparatus and method for decoding a sequence of pseudo-ternary digital signals 失效
    Vorrichtung und Verfahren zur Dekodierung einer Folgepseudoternärerdigitaler Signale。

    公开(公告)号：EP0209839A2

    公开(公告)日：1987-01-28

    申请号：EP86109713.7

    申请日：1986-07-15

    申请人： International Business Machines Corporation

    发明人： Eggenberger, John Scott ,  Turner, David Price

    IPC分类号： H03M13/12 ,  H03M13/00 ,  H03M5/18

    CPC分类号： H03M5/18 ,  H03M13/23

    摘要： The present invention relates to apparatus for decoding a sequence of pseudo-ternary digital signals (100), wherein each signal can have one of three possible values, a zero value, a positive value or a negative value. The apparatus is of the type which comprises storage means (116) for storing an estimator (E) representing each of the possible positive and negative values, sampling means (102) for sampling the sequence of signals (100) at predetermined time intervals and obtaining sample signals (S), and comparison means (94, 112) for comparing each sample signal (S) with the estimator (E) to determine whether each sample signal (S) is equivalent to any one of the possible values.
    Apparatus in accordance with the invention is characterised in that the comparison means comprises estimator changing means (114) for changing the current amplitude of the estimator (E) to the amplitude of a sample signal (S) when the amplitude of the sample signal appears to represent one of the possible positive or negative values more accurately than the current amplitude of the estimator.
    The invention also relates to a method of decoding a sequence of pseudo-ternary digital signals, wherein each signal can have one of three possible values, a zero value, a positive value or a negative value, utilising apparatus as defined above.

    摘要翻译： 本发明涉及用于解码伪三元数字信号序列（100）的装置，其中每个信号可以具有三个可能值中的一个，零值，正值或负值。 该装置是包括用于存储表示可能的正值和负值中的每一个的估计器（E）的存储装置（116），用于以预定的时间间隔对信号序列（100）进行采样的采样装置（102） 采样信号（S）和用于将每个采样信号（S）与估计器（E）进行比较的比较装置（94,112），以确定每个采样信号（S）是否等于任何一个可能的值。 根据本发明的装置的特征在于，比较装置包括估计器改变装置（114），用于当采样信号的振幅看起来变化时，将估计器（E）的当前幅度改变为采样信号（S）的振幅 比估计器的当前幅度更准确地表示可能的正值或负值之一。 本发明还涉及一种解码伪三元数字信号序列的方法，其中每个信号可以使用如上所述的装置的三个可能值中的一个，零值，正值或负值。

    MULTI-LEVEL ENCODING FOR BATTERY MANAGEMENT SYSTEM
    34.
    发明公开
    MULTI-LEVEL ENCODING FOR BATTERY MANAGEMENT SYSTEM 审中-公开

    公开(公告)号：EP3780528A1

    公开(公告)日：2021-02-17

    申请号：EP19306014.2

    申请日：2019-08-14

    申请人： NXP USA, Inc.

    发明人： BORDES, Laurent ,  BERTRAND, Simon ,  HUOT-MARCHAND, Alexis Nathanael

    IPC分类号： H04L25/08 ,  H03M5/18 ,  H04L25/49 ,  H02J7/00 ,  H04L25/02

    摘要： A battery management system comprises a first and second battery cell controllers and a transmission line providing a point-to-point signal transmission path between the first and second battery cell controllers. At least one of the first and second battery cell controllers includes a logic circuit constructed and arranged for encoding data for transmission as a serial data stream along the signal transmission path in compliance with a multi-level encoding technique. The logic circuit comprises an encoding/decoding circuit that generates a modulated signal of the serial data stream over at least three discrete signal levels at a predetermined and fixed data pulse frequency for transmission through the transmission line and encodes a plurality of data units of the serial data stream into a data packet. The data packet includes at least three symbols constructed and arranged with at least four consecutive transmissions per symbol. Each transmission of each symbol assumes one of the three discrete signal levels. At least one transceiver is configured in a transmit mode or a receive mode and that discards any combinations of the maximum number of possible combinations to reduce a source of electromagnetic interference (EMI) on the transmission line.