公开(公告)号：EP0882326A2

公开(公告)日：1998-12-09

申请号：EP97946776.0

申请日：1997-12-03

申请人： NOKIA TELECOMMUNICATIONS OY

发明人： PIIRAINEN, Olli

IPC分类号： H03H17

CPC分类号： H03H17/0671 ,  H03H17/0621

摘要： The invention relates to a decimation method and a decimation filter, which provide the transfer function of a CIC decimation filter. Decimation of the number of order N is performed by coefficient M, whereby FIR filtering is carried out in the main branch (100) of the decimation filter by M-tap FIR filters (20) N times in sequence, decimation is carried out by decimation means (21) by coefficient M and comb-filtering is carried out by means (22) N - 1 times. The effect of sample cycles M preceding the sample cycle M to be processed is taken into account by using side branches (101, 102, 104) and additional branches (103, 105, 106, 107).

公开(公告)号：EP0658979A3

公开(公告)日：1996-06-26

申请号：EP94308996.1

申请日：1994-12-05

申请人： AT&T Corp.

发明人： Norsworthy, Steven Robert

IPC分类号： H03H17/06

CPC分类号： H03H17/0671 ,  H03H17/0621

摘要： In accordance with an embodiment of the invention, a data converter (e.g., 720, 84, 78) is disclosed that provides a sampling rate conversion. The converter receives a clock signal (e.g., CKOS, CKL1, CPD or CPI), a divided-down clock signal (e.g., CKM1, CKL1, CKL2, CPDM2, or CPIL3), and first digital signal samples at a first rate. The converter converts the first digital signal samples to second digital signal samples at a second rate. The ratio of the first rate to the second rate is defined as a fist conversion rate factor. In an alternate embodiment, another stage of sampling rate conversion is provided by a second data converter. The second converter receives the divided-down clock signal, a further divided-down clock signal, and the second digital signal samples. The second data converter converts the second digital signal samples to the third rate. The ratio of the second rate to the third rate is defined as a second conversion rate factor. A second programmable counter receives the divided down clock signal and divides it down to produce a further divided-down clock signal. The second programmable counter is programmable to selectively determine the second conversion rate factor.

摘要翻译： 根据本发明的实施例，公开了提供采样率转换的数据转换器（例如，720,84,78）。 转换器接收时钟信号（例如，CKOS，CKL1，CPD或CPI），分频时钟信号（例如，CKM1，CKL1，CKL2，CPDM2或CPIL3），并以第一速率采样第一数字信号。 转换器以第二速率将第一数字信号采样转换为第二数字信号采样。 第一速率与第二速率的比率被定义为第一转换率因子。 在替代实施例中，另一级采样率转换由第二数据转换器提供。 第二转换器接收分频时钟信号，进一步分频时钟信号和第二数字信号采样。 第二数据转换器将第二数字信号采样转换成第三速率。 第二速率与第三速率的比率被定义为第二转换率因子。 第二可编程计数器接收分频下降时钟信号并将其分频以产生另外的分频时钟信号。 第二可编程计数器是可编程的，以选择性地确定第二转换速率因子。

公开(公告)号：EP0658979A2

公开(公告)日：1995-06-21

申请号：EP94308996.1

申请日：1994-12-05

申请人： AT&T Corp.

发明人： Norsworthy, Steven Robert

IPC分类号： H03H17/06

CPC分类号： H03H17/0671 ,  H03H17/0621

摘要： In accordance with an embodiment of the invention, a data converter (e.g., 720, 84, 78) is disclosed that provides a sampling rate conversion. The converter receives a clock signal (e.g., CKOS, CKL1, CPD or CPI), a divided-down clock signal (e.g., CKM1, CKL1, CKL2, CPDM2, or CPIL3), and first digital signal samples at a first rate. The converter converts the first digital signal samples to second digital signal samples at a second rate. The ratio of the first rate to the second rate is defined as a fist conversion rate factor.
In an alternate embodiment, another stage of sampling rate conversion is provided by a second data converter. The second converter receives the divided-down clock signal, a further divided-down clock signal, and the second digital signal samples. The second data converter converts the second digital signal samples to the third rate. The ratio of the second rate to the third rate is defined as a second conversion rate factor. A second programmable counter receives the divided down clock signal and divides it down to produce a further divided-down clock signal. The second programmable counter is programmable to selectively determine the second conversion rate factor.