B-ISDN ACCESS
    71.
    发明授权
    B-ISDN ACCESS 失效
    B-ISDN接入

    公开(公告)号:EP0753237B1

    公开(公告)日:1998-10-07

    申请号:EP95913229.1

    申请日:1995-03-28

    申请人: GPT LIMITED

    IPC分类号: H04Q11/04

    摘要: To increase the number of subscriber network ports which may be accessed on a Broadband Integrated Services Digital (B-ISDN) access network using Asynchronous Transfer Mode (ATM) technology where a Concentration Function is provided by statistical multiplexers, a Grooming Function by ATM switches and own-access-network connections is provided by combining "upstream" ports into the core network(s) and the "downstream" ports to subscribers into a common address group and each subscriber port and each core network(s) access port is allocated a unique OSI Layer 2 address the access network destination address being carried in the Virtual Path Identifier (VPI) field of each ATM cell formatted according to relevant CCITT recommendations for the User Network Interface (UNI) or the Network to Network Interface (NNI) and the Virtual Channel Identifier (VCI) field of the CCITT recommendations is divided into two sub-fields which carry the OSI Layer 2 source address and a Terminal Equipment Identifier (TEI) field respectively, the TEI field being used to identify a virtual channel at the source and destination ends of a path.

    Computer apparatus and bus control scheme
    72.
    发明公开
    Computer apparatus and bus control scheme 失效
    Rechnervorrichtung und Bussteuerungsschema

    公开(公告)号:EP0797151A2

    公开(公告)日:1997-09-24

    申请号:EP97301829.4

    申请日:1997-03-18

    IPC分类号: G06F13/362

    摘要: A continuous data server includes a storage unit connected to a buffer memory which is in turn connected to a plurality of communication control units which transfer data of the buffer memory to a network. The right to use a bus interconnecting the buffer memory and communication control units is deterministically assigned by a micro-scheduler in accordance with a program stored in a micro-schedule table. The micro-scheduler allocates the right to use the bus in accordance with a predetermined schedule, rather than by arbitration.

    摘要翻译: 连续数据服务器包括连接到缓冲存储器的存储单元,缓冲存储器又连接到将缓冲存储器的数据传送到网络的多个通信控制单元。 使用连接缓冲存储器和通信控制单元的总线的权利由微调度器根据存储在微调度表中的程序确定性地分配。 微调度员根据预定的时间表而不是通过仲裁来分配使用总线的权利。

    ASYNCHRONOUS DATA TRANSFER AND SOURCE TRAFFIC CONTROL SYSTEM
    74.
    发明公开
    ASYNCHRONOUS DATA TRANSFER AND SOURCE TRAFFIC CONTROL SYSTEM 失效
    系统进行异步数据传输和控制源流量

    公开(公告)号:EP0724796A1

    公开(公告)日:1996-08-07

    申请号:EP94929268.0

    申请日:1994-09-20

    发明人: UPP, Daniel, C.

    IPC分类号: G06F13 H04L12 H04Q11

    摘要: An asynchronous data transfer and source traffic control system includes a bus master (100) and a plurality of bus users (112, 114, 116) coupled to a bidirectional data bus (120-128). The bus master (100) provides two clock signals (120, 122) to each bus user (112, 114, 116), a system clock (120) and a frame clock (122). The frame clock designates the start of a frame. A frame format preferably includes fifteen or sixteen system clock cycles, the first of which is designated the request field and the last of which includes a grant field. One or more other cycles may be assigned control and/or routing information and the remainder of the cycles comprise a data field of fixed length. During the request field, any number of bus users (112, 114, 116) may request access which is received by the bus master (100). During the grant field, the bus master (100) grants access to a selected bus user (112, 114, 116) for the entire data portion of the next frame. Which user (112, 114, 116) is granted access to the next frame is determined according to an arbitration algorithm in the bus master (100) which may be unknown to the bus users (112, 114, 116). The asynchronous data transfer and source traffic control system has particular application in accommodating the transfer of the contents of ATM cells used in BISDN systems.

    A medium access control protocol for single bus fair access local area network
    75.
    发明公开
    A medium access control protocol for single bus fair access local area network 失效
    协议用于局域网与鞋底总线和公平地获取媒体访问控制。

    公开(公告)号:EP0669780A3

    公开(公告)日:1996-08-07

    申请号:EP95300577.4

    申请日:1995-01-30

    申请人: Zheng, Liu

    发明人: Zheng, Liu

    摘要: A method provides for priority data transmission utilizing medium access control protocol with a fair cell-access scheme having a two-level priority for access in a local area network having a unidirectional looped bus and a plurality of network stations coupled to the bus for asynchronous cell transmissions from one network station to other network stations. A head-of-bus is used to generate continuously time slots to the bus. Each of the time slots includes a busy bit, a high priority slot reserved bit, a low priority slot reserved bit, a high priority slot reservation bit, and a low priority slot reservation bit. The method further extends the two-level cell access to n-level cell access. Each of the time slots thus includes a busy bit, n priority slot reserved bits, and n priority slot reservation bits. The medium access control protocol makes use of the busy bit, the priority slot reserved bits, and the priority slot reservation bits so as to provide fair bandwidth sharing by all of the network stations connected to the bus.

    System for detecting failure in dual bus user network
    76.
    发明公开
    System for detecting failure in dual bus user network 失效
    用于检测双总线用户网络故障的系统

    公开(公告)号:EP0522430A3

    公开(公告)日:1993-03-24

    申请号:EP92111132.4

    申请日:1992-07-01

    申请人: FUJITSU LIMITED

    IPC分类号: H04Q11/04 H04L12/28 H04L12/26

    摘要: In each of a plurality of subscriber systems included in a B-ISDN for controlling access competition among a plurality of terminals under the DQDB protocol, the terminals (13) are electrically connected to a dual bus comprising a downbus (2a) and an upbus (2b) both extending from a network terminal (1). Each of the terminals has data transmission processing means (8), downbus processing means (10a), upbus processing means (10b), a timer (11) and failure detecting means (12). When data transmission request is issued from the data transmission processing means (8), the failure detecting means (12) is activated in response to this request to start the timer (12) so as to count a given time interval which has elapsed. If either a request message or data cannot be sent even when the timer takes time out, then the failure detecting means (8) determines that a failure has occurred in the dual bus.

    Interface pour accès en émission et en réception au support de transmission synchrone d'un réseau de commutation réparti
    77.
    发明公开
    Interface pour accès en émission et en réception au support de transmission synchrone d'un réseau de commutation réparti 失效
    接口,用于访问基于在分布式网络中同步传输的发射机和接收机。

    公开(公告)号:EP0462294A1

    公开(公告)日:1991-12-27

    申请号:EP90110996.7

    申请日:1990-06-11

    IPC分类号: H04L12/64

    摘要: Cette interface pour accès en émission et en réception au support de transmission synchrone (1) d'un réseau de commutation réparti, ledit réseau étant architecturé autour d'un support de transmission partagé dans le temps entre différentes stations et chaque station comportant des moyens pour déterminer les positions temporelles correspondant aux données à écrire ou à lire sur ledit support, comporte dans chaque station, pour chaque sens de transmission, un couple de mémoires (A, B, A', B') dont l'une accède audit support respectivement en émission et en réception, en synchronisme avec la présentation des positions temporelles sur ledit support, tandis que l'autre est respectivement écrite ou lue, sous la commande desdits moyens de détermination de positions temporelles, et vice versa.

    摘要翻译: 此接口用于发送和接收到分布式通信网络的同步传输介质(1)模式的访问,所述网络被围绕一个传输介质的所有这是时间共享的不同站和每个站确定性采矿的包括用于所述时间相对应的位置之间architectured 到数据要被写入或从所述介质读出,包括在每个站中,对其中的一个访问所述介质在发送和传输的每个方向,一对存储器(A,B,A“ B”) 分别接收模式下,分别与在介质。所述时间位置的呈现同步,而另一个写入或读取的,确定性的采矿时间位置的所述装置的控制下,并且反之亦然。 ... ...