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公开(公告)号：EP4439984A1
公开(公告)日：2024-10-02
申请号：EP24165837.6
申请日：2024-03-25
IPC分类号： H03K19/17736 , G06F13/00
CPC分类号： H03K19/17736 , G06F13/00
摘要： A bus controller-based programmable logic device (PLD) architecture is provided and includes a dual-port unit (150) interposed between bus controllers (130, 140). The dual port unit includes first and second data transfer layers (151, 152). The first data transfer layer includes write and read areas for data transfer between the first and second bus controllers, respectively. A write to the read area is prevented during a read by the second bus controller. The second data transfer layer includes read and write areas for data transfer between the first and second bus controllers, respectively. A write to the read area is prevented during a read by the first bus controller.
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公开(公告)号：EP4015870B1
公开(公告)日：2024-09-11
申请号：EP20275187.1
申请日：2020-12-21
IPC分类号： F16H35/00
CPC分类号： F16H2035/00620130101 , F16H35/00
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公开(公告)号：EP3549859B1
公开(公告)日：2022-06-01
申请号：EP18166073.9
申请日：2018-04-06
发明人： JONES, Tony , BACON, Peter
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公开(公告)号：EP3462014B1
公开(公告)日：2021-06-09
申请号：EP17275151.3
申请日：2017-09-28
发明人： Morgan, Antony
IPC分类号： F02K1/76
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公开(公告)号：EP3480070B1
公开(公告)日：2020-10-07
申请号：EP17275178.6
申请日：2017-11-02
发明人： DAVIES, Stephen
IPC分类号： B60T1/06
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公开(公告)号：EP3572683B1
公开(公告)日：2020-08-26
申请号：EP18275069.5
申请日：2018-05-23
发明人： KRACKE, Jeremy , WILLIAMSON, Tom R.
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公开(公告)号：EP3261238B1
公开(公告)日：2020-08-12
申请号：EP16275085.5
申请日：2016-06-23
发明人： HAWKSWORTH, Andrew , PROVERBS, Paul
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