Microprogram sequence controller
    1.
    发明公开
    Microprogram sequence controller 失效
    微控制器序列控制器

    公开(公告)号:EP0448127A3

    公开(公告)日:1992-12-23

    申请号:EP91106315.4

    申请日:1985-05-07

    Abstract: A one-chip, integrated-circuit, microprogram sequence controller for use in a microprogrammed system having a data processing unit and a microprogram memory, that controls the order and execution of microinstructions within the microprogram memory. The controller is provided with two 16-bit microinstruction address input busses and a 16-bit output bus on which microinstruction addresses are issued to the microprogram memory. One of the input busses and the output busses are bidirectional providing access to various on-chip parameters such as the contents of the top of an on-chip stack memory or the value of an on-chip stack pointer. An on-chip comparator permits trapping of a microinstruction at a specified address or gathering of run-time statistics. A structured, 64-element instruction set is provided which includes sixteen special-function continue instructions which perform additional operations without imposing added time requirements. A set of multiway instructions are provided affording selection of alternative multiway branch addresses from four 4-bit data inputs to the controller.

    Microprogramme sequence controller
    2.
    发明公开
    Microprogramme sequence controller 失效
    序控制器固件

    公开(公告)号:EP0167241A3

    公开(公告)日:1989-03-29

    申请号:EP85303224.1

    申请日:1985-05-07

    Abstract: A one-chip, integrated-circuit, microprogram sequence controller for use in a microprogrammed system having a data processing unit and a microprogram memory, that controls the order and execution of microinstructions within the microprogram memory. The controller is provided with two 16-bit microinstruction address input busses and a 16-bit output bus on which microinstruction addresses are issued to the microprogram memory. One of the input busses and the output busses are bidirectional providing access to various on-chip parameters such as the contents of the top of an on-chip stack memory or the value of an on-chip stack pointer. An on-chip comparator permits trapping of a microinstruction at a specified address or gathering of runtime statistics. A structured, 64-element instruction set is provided which includes sixteen special-function continue instructions which perform additional operations without imposing added time requirements. A set of multiway instructions are provided affording selection of alternative multiway branch addresses from four 4- bit data inputs to the controller.

    Microprogram sequence controller
    5.
    发明公开
    Microprogram sequence controller 失效
    Mikroprogrammablaufsteuerung。

    公开(公告)号:EP0448127A2

    公开(公告)日:1991-09-25

    申请号:EP91106315.4

    申请日:1985-05-07

    Abstract: A one-chip, integrated-circuit, microprogram sequence controller for use in a microprogrammed system having a data processing unit and a microprogram memory, that controls the order and execution of microinstructions within the microprogram memory. The controller is provided with two 16-bit microinstruction address input busses and a 16-bit output bus on which microinstruction addresses are issued to the microprogram memory. One of the input busses and the output busses are bidirectional providing access to various on-chip parameters such as the contents of the top of an on-chip stack memory or the value of an on-chip stack pointer. An on-chip comparator permits trapping of a microinstruction at a specified address or gathering of run-time statistics. A structured, 64-element instruction set is provided which includes sixteen special-function continue instructions which perform additional operations without imposing added time requirements. A set of multiway instructions are provided affording selection of alternative multiway branch addresses from four 4-bit data inputs to the controller.

    Abstract translation: 用于具有数据处理单元和微程序存储器的微程序系统的单芯片集成电路微程序序列控制器,其控制微程序存储器内的微指令的顺序和执行。 该控制器具有两个16位微指令地址输入总线和一个16位输出总线,微指令地址向微程序存储器发出。 输入总线和输出总线中的一个是双向的,提供对诸如片上堆栈存储器的顶部的内容或片上堆栈指针的值的各种片上参数的访问。 片上比较器允许在指定地址捕获微指令或收集运行时统计信息。 提供了一个结构化的64元素指令集,其中包括十六个特殊功能的继续指令,执行附加操作,而不需要增加时间要求。 提供一组多路指令,提供从四个4位数据输入到控制器的替代多路分支地址的选择。

    Microprogramme sequence controller
    6.
    发明公开
    Microprogramme sequence controller 失效
    Mikroprogrammablaufsteuerung。

    公开(公告)号:EP0167241A2

    公开(公告)日:1986-01-08

    申请号:EP85303224.1

    申请日:1985-05-07

    Abstract: A one-chip, integrated-circuit, microprogram sequence controller for use in a microprogrammed system having a data processing unit and a microprogram memory, that controls the order and execution of microinstructions within the microprogram memory. The controller is provided with two 16-bit microinstruction address input busses and a 16-bit output bus on which microinstruction addresses are issued to the microprogram memory. One of the input busses and the output busses are bidirectional providing access to various on-chip parameters such as the contents of the top of an on-chip stack memory or the value of an on-chip stack pointer. An on-chip comparator permits trapping of a microinstruction at a specified address or gathering of runtime statistics. A structured, 64-element instruction set is provided which includes sixteen special-function continue instructions which perform additional operations without imposing added time requirements. A set of multiway instructions are provided affording selection of alternative multiway branch addresses from four 4- bit data inputs to the controller.

    Abstract translation: 这些指令是一组每个指令包括一个字段中排列的位。 控制器通过输入数据总线,指令字总线和输出数据总线与外部设备进行通信。 比较器寄存器(128)与内部双向数据总线(110)连接,用于临时接收和存储指令地址。 比较器(129)与比较器寄存器连接以接收存储的指令地址和输出数据总线的线路(174),以接收由微程序序列控制器在输出数据总线上产生的指令地址。 当这两个指令相等时,比较器将信号相等。

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