-
1.发明授权Simultaneously-sampling single-ended and differential two-input analog-to-digital converter 有权同时扫描地单端和差分双输入模拟 - 数字转换器公开(公告)号：EP2538562B1
公开(公告)日：2016-10-19
申请号：EP12004634.7
申请日：2012-06-20
Applicant: Linear Technology Corporation
CPC classification number: H03M1/0682 , H03M1/1076 , H03M1/468 , H03M3/35 , H03M3/378 , H03M3/438
-
2.发明公开Simultaneously-sampling single-ended and differential two-input analog-to-digital converter 有权同时扫描地单端和差分双输入模拟 - 数字转换器
公开(公告)号：EP2538562A3
公开(公告)日：2013-01-09
申请号：EP12004634.7
申请日：2012-06-20
Applicant: Linear Technology Corporation
CPC classification number: H03M1/0682 , H03M1/1076 , H03M1/468 , H03M3/35 , H03M3/378 , H03M3/438
Abstract: An analog-to-digital converter, ADC, system (200) configured to receive a first (V1) and a second (V2) analog quantity and to provide a plurality of numerical parameters (CODE) representative of the first (V1) and second (V2) analog quantities. The ADC system includes a first (301), a second (302), and a third (305) ADC circuit, and a digital interface circuit (303). The first ADC circuit (301) is configured to provide a first code (D1) representative of the first analog quantity (V1) and to provide a first analog residue quantity (R1) representative of the first analog quantity (V1) with respect to the first code (D1). The second ADC circuit (302) is configured to provide a second code (D2) representative of the second analog quantity (V2) and to provide a second analog residue quantity (R2) representative of the second analog quantity (V2) with respect to the second code (D2). The third ADC circuit (304) is configured to receive the first (R1) and second (R2)analog residue quantities, and to provide a third digital code (D3) representative of a difference of the first (R1) and second (R2) analog residue quantities. The digital interface circuit (303) is configured to receive the first (D1), second (D2), and third (D3) codes, and to provide the plurality of numerical parameters (CODE) representative of the first (V1) and second (V2) analog quantities.
-
3.发明公开Simultaneously-sampling single-ended and differential two-input analog-to-digital converter 有权Gleichzeitig abtastender Eintakt- und Differentialzial-Doppeleangangs-Analog-Digital-Wandler
公开(公告)号：EP2538562A2
公开(公告)日：2012-12-26
申请号：EP12004634.7
申请日：2012-06-20
Applicant: Linear Technology Corporation
CPC classification number: H03M1/0682 , H03M1/1076 , H03M1/468 , H03M3/35 , H03M3/378 , H03M3/438
Abstract: An analog-to-digital converter, ADC, system (200) configured to receive a first (V1) and a second (V2) analog quantity and to provide a plurality of numerical parameters (CODE) representative of the first (V1) and second (V2) analog quantities. The ADC system includes a first (301), a second (302), and a third (305) ADC circuit, and a digital interface circuit (303). The first ADC circuit (301) is configured to provide a first code (D1) representative of the first analog quantity (V1) and to provide a first analog residue quantity (R1) representative of the first analog quantity (V1) with respect to the first code (D1). The second ADC circuit (302) is configured to provide a second code (D2) representative of the second analog quantity (V2) and to provide a second analog residue quantity (R2) representative of the second analog quantity (V2) with respect to the second code (D2). The third ADC circuit (304) is configured to receive the first (R1) and second (R2)analog residue quantities, and to provide a third digital code (D3) representative of a difference of the first (R1) and second (R2) analog residue quantities. The digital interface circuit (303) is configured to receive the first (D1), second (D2), and third (D3) codes, and to provide the plurality of numerical parameters (CODE) representative of the first (V1) and second (V2) analog quantities.
Abstract translation: 一种被配置为接收第一（V1）和第二（V2）模拟量并且提供表示第一（V1）和第二（V2）模拟量的多个数字参数（CODE））的模数转换器ADC系统（200） （V2）模拟量。 ADC系统包括第一（301），第二（302）和第三（305）ADC电路和数字接口电路（303）。 第一ADC电路（301）被配置为提供表示第一模拟量（V1）的第一代码（D1），并且提供代表第一模拟量（V1）的第一模拟量（R1）相对于 第一代码（D1）。 第二ADC电路（302）被配置为提供表示第二模拟量（V2）的第二代码（D2），并且相对于第二模拟量（V2）提供表示第二模拟量（V2）的第二模拟残留量（R2） 第二代码（D2）。 第三ADC电路（304）被配置为接收第一（R1）和第二（R2）模拟残余量，并且提供表示第一（R1）和第二（R2）模拟残余量的第二数字码（D3） 模拟残留量。 数字接口电路（303）被配置为接收第一（D1），第二（D2）和第三（D3）码，并且提供表示第一（V1）和第二（D3）码的多个数字参数（CODE） V2）模拟量。
